add more atmel studio framework code
This commit is contained in:
209
watch-library/hal/include/hal_flash.h
Executable file
209
watch-library/hal/include/hal_flash.h
Executable file
@@ -0,0 +1,209 @@
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/**
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* \file
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*
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* \brief Flash related functionality declaration.
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*
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* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
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*
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||||
* \asf_license_start
|
||||
*
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||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
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||||
*
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||||
*/
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||||
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#ifndef _HAL_FLASH_H_INCLUDED
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#define _HAL_FLASH_H_INCLUDED
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#include <hpl_flash.h>
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/**
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* \addtogroup doc_driver_hal_flash
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*
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* @{
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Forward declaration of flash_descriptor. */
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struct flash_descriptor;
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/** The callback types */
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enum flash_cb_type {
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/** Callback type for ready to accept a new command */
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FLASH_CB_READY,
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/** Callback type for error */
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FLASH_CB_ERROR,
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FLASH_CB_N
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};
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/** \brief Prototype of callback on FLASH
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*
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*/
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typedef void (*flash_cb_t)(struct flash_descriptor *const descr);
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/** \brief FLASH HAL callbacks
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*
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*/
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struct flash_callbacks {
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/** Callback invoked when ready to accept a new command */
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flash_cb_t cb_ready;
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/** Callback invoked when error occurs */
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flash_cb_t cb_error;
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};
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/** \brief FLASH HAL driver struct for asynchronous access
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*/
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struct flash_descriptor {
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/** Pointer to FLASH device instance */
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struct _flash_device dev;
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/** Callbacks for asynchronous transfer */
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struct flash_callbacks callbacks;
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};
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/** \brief Initialize the FLASH HAL instance and hardware for callback mode
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*
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* Initialize FLASH HAL with interrupt mode (uses callbacks).
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance.
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* \param[in] hw Pointer to the hardware base.
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* \return Initialize status.
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*/
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int32_t flash_init(struct flash_descriptor *flash, void *const hw);
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/** \brief Deinitialize the FLASH HAL instance
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*
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* Abort transfer, disable and reset FLASH, and deinitialize software.
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance.
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* \return Deinitialze status.
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*/
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int32_t flash_deinit(struct flash_descriptor *flash);
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/** \brief Writes a number of bytes to a page in the internal Flash
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance.
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* \param[in] dst_addr Destination bytes address to write into flash
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* \param[in] buffer Pointer to a buffer where the content
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* will be written to the flash
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* \param[in] length Number of bytes to write
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* \return Write status.
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*/
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int32_t flash_write(struct flash_descriptor *flash, uint32_t dst_addr, uint8_t *buffer, uint32_t length);
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/** \brief Appends a number of bytes to a page in the internal Flash
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*
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* This functions never erases the flash before writing.
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance.
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* \param[in] dst_addr Destination bytes address to write to flash
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* \param[in] buffer Pointer to a buffer with data to write to flash
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* \param[in] length Number of bytes to append
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* \return Append status.
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*/
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int32_t flash_append(struct flash_descriptor *flash, uint32_t dst_addr, uint8_t *buffer, uint32_t length);
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/** \brief Reads a number of bytes to a page in the internal Flash
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance.
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* \param[in] src_addr Source bytes address to read from flash
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* \param[out] buffer Pointer to a buffer where the content
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* of the read pages will be stored
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* \param[in] length Number of bytes to read
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* \return Read status.
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*/
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int32_t flash_read(struct flash_descriptor *flash, uint32_t src_addr, uint8_t *buffer, uint32_t length);
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/** \brief Register a function as FLASH transfer completion callback
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance.
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* \param[in] type Callback type (\ref flash_cb_type).
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* \param[in] func Pointer to callback function.
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* \retval 0 Success
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* \retval -1 Error
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*/
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int32_t flash_register_callback(struct flash_descriptor *flash, const enum flash_cb_type type, flash_cb_t func);
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/** \brief Execute lock in the internal flash
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance.
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* \param[in] dst_addr Destination bytes address aligned with page
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* start to be locked
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* \param[in] page_nums Number of pages to be locked
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*
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* \return Real locked numbers of pages.
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*/
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int32_t flash_lock(struct flash_descriptor *flash, const uint32_t dst_addr, const uint32_t page_nums);
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/** \brief Execute unlock in the internal flash
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance.
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* \param[in] dst_addr Destination bytes address aligned with page
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* start to be unlocked
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* \param[in] page_nums Number of pages to be unlocked
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*
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* \return Real unlocked numbers of pages.
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*/
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int32_t flash_unlock(struct flash_descriptor *flash, const uint32_t dst_addr, const uint32_t page_nums);
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/** \brief Execute erase in the internal flash
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance.
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* \param[in] dst_addr Destination bytes address aligned with page
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* start to be erased
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* \param[in] page_nums Number of pages to be erased
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* \retval 0 Success
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* \retval -1 Error
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*/
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int32_t flash_erase(struct flash_descriptor *flash, const uint32_t dst_addr, const uint32_t page_nums);
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/**
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* \brief Get the flash page size
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance
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*
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* \return The flash page size
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*/
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uint32_t flash_get_page_size(struct flash_descriptor *flash);
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/**
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* \brief Get the number of flash page
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*
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* \param[in, out] flash Pointer to the HAL FLASH instance.
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*
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* \return The flash total page numbers
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*/
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uint32_t flash_get_total_pages(struct flash_descriptor *flash);
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/** \brief Retrieve the current driver version
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*
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* \return Current driver version.
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*/
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uint32_t flash_get_version(void);
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#ifdef __cplusplus
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}
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#endif
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/**@}*/
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#endif /* ifndef _HAL_FLASH_H_INCLUDED */
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134
watch-library/hal/include/hal_rand_sync.h
Executable file
134
watch-library/hal/include/hal_rand_sync.h
Executable file
@@ -0,0 +1,134 @@
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/**
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* \file
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||||
*
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* \brief Generic Random Number Generator (RAND) functionality declaration.
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*
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||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
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||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _HAL_RAND_SYNC_H_INCLUDED
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#define _HAL_RAND_SYNC_H_INCLUDED
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#include <hpl_rand_sync.h>
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#include <utils_assert.h>
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#ifdef __cplusplus
|
||||
extern "C" {
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#endif
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/**
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* \addtogroup doc_driver_hal_rand_sync
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*
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*@{
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*/
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/** Random Number Generator polling device. */
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struct rand_sync_desc {
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struct _rand_sync_dev dev;
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||||
};
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||||
/**
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* \brief Initialize the Random Number Generator Driver
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* \param[out] desc Pointer to the device descriptor instance struct
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* \param[in, out] hw Pointer to the hardware for device instance
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* \return Initialization operation result status, ERR_NONE (0) for OK.
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*/
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int32_t rand_sync_init(struct rand_sync_desc *const desc, void *const hw);
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/**
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* \brief Deinitialize the Random Number Generator Driver
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* \param[out] desc Pointer to the device descriptor instance struct
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*/
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void rand_sync_deinit(struct rand_sync_desc *const desc);
|
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|
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/**
|
||||
* \brief Enable the Random Number Generator Driver
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* \param[out] desc Pointer to the device descriptor instance struct
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* \return Enable operation result status, ERR_NONE (0) for OK.
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*/
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int32_t rand_sync_enable(struct rand_sync_desc *const desc);
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/**
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* \brief Disable the Random Number Generator Driver
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* \param[out] desc Pointer to the device descriptor instance struct
|
||||
*/
|
||||
void rand_sync_disable(struct rand_sync_desc *const desc);
|
||||
|
||||
/**
|
||||
* \brief Set seed for the Random Number Generator Driver
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* \param[out] desc Pointer to the device descriptor instance struct
|
||||
*/
|
||||
int32_t rand_sync_set_seed(struct rand_sync_desc *const desc, const uint32_t seed);
|
||||
|
||||
/**
|
||||
* \brief Read the 8-bit Random Number
|
||||
* \param[in] desc Pointer to the device descriptor instance struct
|
||||
* \return The random number generated
|
||||
*/
|
||||
uint8_t rand_sync_read8(const struct rand_sync_desc *const desc);
|
||||
|
||||
/**
|
||||
* \brief Read the 32-bit Random Number
|
||||
* \param[in] desc Pointer to the device descriptor instance struct
|
||||
* \return The random number generated
|
||||
*/
|
||||
uint32_t rand_sync_read32(const struct rand_sync_desc *const desc);
|
||||
|
||||
/**
|
||||
* \brief Read the 8-bit Random Number Sequence into a buffer
|
||||
* \param[in] desc Pointer to the device descriptor instance struct
|
||||
* \param[out] buf Pointer to the buffer to fill an array of generated numbers
|
||||
* \param[in] len Number of random numbers to read
|
||||
*/
|
||||
void rand_sync_read_buf8(const struct rand_sync_desc *const desc, uint8_t *buf, uint32_t len);
|
||||
|
||||
/**
|
||||
* \brief Read the 32-bit Random Number Sequence into a buffer
|
||||
* \param[in] desc Pointer to the device descriptor instance struct
|
||||
* \param[out] buf Pointer to the buffer to fill an array of generated numbers
|
||||
* \param[in] len Number of random numbers to read
|
||||
*/
|
||||
void rand_sync_read_buf32(const struct rand_sync_desc *const desc, uint32_t *buf, uint32_t len);
|
||||
|
||||
/**
|
||||
* \brief Retrieve the current driver version
|
||||
*
|
||||
* \return Current driver version.
|
||||
*/
|
||||
uint32_t rand_sync_get_version(void);
|
||||
|
||||
/* I/O read will be used to get random data. */
|
||||
|
||||
/**@}*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _HAL_RAND_SYNC_H_INCLUDED */
|
||||
221
watch-library/hal/include/hal_spi_m_sync.h
Executable file
221
watch-library/hal/include/hal_spi_m_sync.h
Executable file
@@ -0,0 +1,221 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SPI related functionality declaration.
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _HAL_SPI_M_SYNC_H_INCLUDED
|
||||
#define _HAL_SPI_M_SYNC_H_INCLUDED
|
||||
|
||||
#include <hal_io.h>
|
||||
#include <hpl_spi_m_sync.h>
|
||||
|
||||
/**
|
||||
* \addtogroup doc_driver_hal_spi_master_sync
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \brief SPI HAL driver struct for polling mode
|
||||
*
|
||||
*/
|
||||
struct spi_m_sync_descriptor {
|
||||
struct _spi_m_sync_hpl_interface *func;
|
||||
/** SPI device instance */
|
||||
struct _spi_sync_dev dev;
|
||||
/** I/O read/write */
|
||||
struct io_descriptor io;
|
||||
/** Flags for HAL driver */
|
||||
uint16_t flags;
|
||||
};
|
||||
|
||||
/** \brief Set the SPI HAL instance function pointer for HPL APIs.
|
||||
*
|
||||
* Set SPI HAL instance function pointer for HPL APIs.
|
||||
*
|
||||
* \param[in] spi Pointer to the HAL SPI instance.
|
||||
* \param[in] func Pointer to the HPL api structure.
|
||||
*
|
||||
*/
|
||||
void spi_m_sync_set_func_ptr(struct spi_m_sync_descriptor *spi, void *const func);
|
||||
|
||||
/** \brief Initialize SPI HAL instance and hardware for polling mode
|
||||
*
|
||||
* Initialize SPI HAL with polling mode.
|
||||
*
|
||||
* \param[in] spi Pointer to the HAL SPI instance.
|
||||
* \param[in] hw Pointer to the hardware base.
|
||||
*
|
||||
* \return Operation status.
|
||||
* \retval ERR_NONE Success.
|
||||
* \retval ERR_INVALID_DATA Error, initialized.
|
||||
*/
|
||||
int32_t spi_m_sync_init(struct spi_m_sync_descriptor *spi, void *const hw);
|
||||
|
||||
/** \brief Deinitialize the SPI HAL instance and hardware
|
||||
*
|
||||
* Abort transfer, disable and reset SPI, deinit software.
|
||||
*
|
||||
* \param[in] spi Pointer to the HAL SPI instance.
|
||||
*
|
||||
* \return Operation status.
|
||||
* \retval ERR_NONE Success.
|
||||
* \retval <0 Error code.
|
||||
*/
|
||||
void spi_m_sync_deinit(struct spi_m_sync_descriptor *spi);
|
||||
|
||||
/** \brief Enable SPI
|
||||
*
|
||||
* \param[in] spi Pointer to the HAL SPI instance.
|
||||
*
|
||||
* \return Operation status.
|
||||
* \retval ERR_NONE Success.
|
||||
* \retval <0 Error code.
|
||||
*/
|
||||
void spi_m_sync_enable(struct spi_m_sync_descriptor *spi);
|
||||
|
||||
/** \brief Disable SPI
|
||||
*
|
||||
* \param[in] spi Pointer to the HAL SPI instance.
|
||||
*
|
||||
* \return Operation status.
|
||||
* \retval ERR_NONE Success.
|
||||
* \retval <0 Error code.
|
||||
*/
|
||||
void spi_m_sync_disable(struct spi_m_sync_descriptor *spi);
|
||||
|
||||
/** \brief Set SPI baudrate
|
||||
*
|
||||
* Works if SPI is initialized as master, it sets the baudrate.
|
||||
*
|
||||
* \param[in] spi Pointer to the HAL SPI instance.
|
||||
* \param[in] baud_val The target baudrate value
|
||||
* (see "baudrate calculation" for calculating the value).
|
||||
*
|
||||
* \return Operation status.
|
||||
* \retval ERR_NONE Success.
|
||||
* \retval ERR_BUSY Busy
|
||||
* \retval ERR_INVALID_ARG The baudrate is not supported.
|
||||
*/
|
||||
int32_t spi_m_sync_set_baudrate(struct spi_m_sync_descriptor *spi, const uint32_t baud_val);
|
||||
|
||||
/** \brief Set SPI mode
|
||||
*
|
||||
* Set the SPI transfer mode (\ref spi_transfer_mode),
|
||||
* which controls the clock polarity and clock phase:
|
||||
* - Mode 0: leading edge is rising edge, data sample on leading edge.
|
||||
* - Mode 1: leading edge is rising edge, data sample on trailing edge.
|
||||
* - Mode 2: leading edge is falling edge, data sample on leading edge.
|
||||
* - Mode 3: leading edge is falling edge, data sample on trailing edge.
|
||||
*
|
||||
* \param[in] spi Pointer to the HAL SPI instance.
|
||||
* \param[in] mode The mode (0~3).
|
||||
*
|
||||
* \return Operation status.
|
||||
* \retval ERR_NONE Success.
|
||||
* \retval ERR_BUSY Busy
|
||||
* \retval ERR_INVALID_ARG The mode is not supported.
|
||||
*/
|
||||
int32_t spi_m_sync_set_mode(struct spi_m_sync_descriptor *spi, const enum spi_transfer_mode mode);
|
||||
|
||||
/** \brief Set SPI transfer character size in number of bits
|
||||
*
|
||||
* The character size (\ref spi_char_size) influence the way the data is
|
||||
* sent/received.
|
||||
* For char size <= 8-bit, data is stored byte by byte.
|
||||
* For char size between 9-bit ~ 16-bit, data is stored in 2-byte length.
|
||||
* Note that the default and recommended char size is 8-bit since it's
|
||||
* supported by all system.
|
||||
*
|
||||
* \param[in] spi Pointer to the HAL SPI instance.
|
||||
* \param[in] char_size The char size (~16, recommended 8).
|
||||
*
|
||||
* \return Operation status.
|
||||
* \retval ERR_NONE Success.
|
||||
* \retval ERR_BUSY Busy
|
||||
* \retval ERR_INVALID_ARG The char size is not supported.
|
||||
*/
|
||||
int32_t spi_m_sync_set_char_size(struct spi_m_sync_descriptor *spi, const enum spi_char_size char_size);
|
||||
|
||||
/** \brief Set SPI transfer data order
|
||||
*
|
||||
* \param[in] spi Pointer to the HAL SPI instance.
|
||||
* \param[in] dord The data order: send LSB/MSB first.
|
||||
*
|
||||
* \return Operation status.
|
||||
* \retval ERR_NONE Success.
|
||||
* \retval ERR_BUSY Busy
|
||||
* \retval ERR_INVALID_ARG The data order is not supported.
|
||||
*/
|
||||
int32_t spi_m_sync_set_data_order(struct spi_m_sync_descriptor *spi, const enum spi_data_order dord);
|
||||
|
||||
/** \brief Perform the SPI data transfer (TX and RX) in polling way
|
||||
*
|
||||
* Activate CS, do TX and RX and deactivate CS. It blocks.
|
||||
*
|
||||
* \param[in, out] spi Pointer to the HAL SPI instance.
|
||||
* \param[in] xfer Pointer to the transfer information (\ref spi_xfer).
|
||||
*
|
||||
* \retval size Success.
|
||||
* \retval >=0 Timeout, with number of characters transferred.
|
||||
* \retval ERR_BUSY SPI is busy
|
||||
*/
|
||||
int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *xfer);
|
||||
|
||||
/**
|
||||
* \brief Return the I/O descriptor for this SPI instance
|
||||
*
|
||||
* This function will return an I/O instance for this SPI driver instance.
|
||||
*
|
||||
* \param[in] spi An SPI master descriptor, which is used to communicate through
|
||||
* SPI
|
||||
* \param[in, out] io A pointer to an I/O descriptor pointer type
|
||||
*
|
||||
* \retval ERR_NONE
|
||||
*/
|
||||
int32_t spi_m_sync_get_io_descriptor(struct spi_m_sync_descriptor *const spi, struct io_descriptor **io);
|
||||
|
||||
/** \brief Retrieve the current driver version
|
||||
*
|
||||
* \return Current driver version.
|
||||
*/
|
||||
uint32_t spi_m_sync_get_version(void);
|
||||
|
||||
/**@}*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _HAL_SPI_M_SYNC_H_INCLUDED */
|
||||
247
watch-library/hal/include/hal_usart_sync.h
Executable file
247
watch-library/hal/include/hal_usart_sync.h
Executable file
@@ -0,0 +1,247 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief USART related functionality declaration.
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _HAL_SYNC_USART_H_INCLUDED
|
||||
#define _HAL_SYNC_USART_H_INCLUDED
|
||||
|
||||
#include "hal_io.h"
|
||||
#include <hpl_usart_sync.h>
|
||||
|
||||
/**
|
||||
* \addtogroup doc_driver_hal_usart_sync
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Synchronous USART descriptor
|
||||
*/
|
||||
struct usart_sync_descriptor {
|
||||
struct io_descriptor io;
|
||||
struct _usart_sync_device device;
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Initialize USART interface
|
||||
*
|
||||
* This function initializes the given I/O descriptor to be used
|
||||
* as USART interface descriptor.
|
||||
* It checks if the given hardware is not initialized and
|
||||
* if the given hardware is permitted to be initialized.
|
||||
*
|
||||
* \param[out] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] hw The pointer to hardware instance
|
||||
* \param[in] func The pointer to as set of functions pointers
|
||||
*
|
||||
* \return Initialization status.
|
||||
*/
|
||||
int32_t usart_sync_init(struct usart_sync_descriptor *const descr, void *const hw, void *const func);
|
||||
|
||||
/**
|
||||
* \brief Deinitialize USART interface
|
||||
*
|
||||
* This function deinitializes the given I/O descriptor.
|
||||
* It checks if the given hardware is initialized and
|
||||
* if the given hardware is permitted to be deinitialized.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return De-initialization status.
|
||||
*/
|
||||
int32_t usart_sync_deinit(struct usart_sync_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Enable USART interface
|
||||
*
|
||||
* Enables the USART interface
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return Enabling status.
|
||||
*/
|
||||
int32_t usart_sync_enable(struct usart_sync_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Disable USART interface
|
||||
*
|
||||
* Disables the USART interface
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return Disabling status.
|
||||
*/
|
||||
int32_t usart_sync_disable(struct usart_sync_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Retrieve I/O descriptor
|
||||
*
|
||||
* This function retrieves the I/O descriptor of the given USART descriptor.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[out] io An I/O descriptor to retrieve
|
||||
*
|
||||
* \return The status of the I/O descriptor retrieving.
|
||||
*/
|
||||
int32_t usart_sync_get_io_descriptor(struct usart_sync_descriptor *const descr, struct io_descriptor **io);
|
||||
|
||||
/**
|
||||
* \brief Specify action for flow control pins
|
||||
*
|
||||
* This function sets the action (or state) for the flow control pins
|
||||
* if the flow control is enabled.
|
||||
* It sets the state of flow control pins only if the automatic support of
|
||||
* the flow control is not supported by the hardware.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] state A state to set the flow control pins
|
||||
*
|
||||
* \return The status of flow control action setup.
|
||||
*/
|
||||
int32_t usart_sync_set_flow_control(struct usart_sync_descriptor *const descr,
|
||||
const union usart_flow_control_state state);
|
||||
|
||||
/**
|
||||
* \brief Set USART baud rate
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] baud_rate A baud rate to set
|
||||
*
|
||||
* \return The status of baud rate setting.
|
||||
*/
|
||||
int32_t usart_sync_set_baud_rate(struct usart_sync_descriptor *const descr, const uint32_t baud_rate);
|
||||
|
||||
/**
|
||||
* \brief Set USART data order
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] data_order A data order to set
|
||||
*
|
||||
* \return The status of data order setting.
|
||||
*/
|
||||
int32_t usart_sync_set_data_order(struct usart_sync_descriptor *const descr, const enum usart_data_order data_order);
|
||||
|
||||
/**
|
||||
* \brief Set USART mode
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] mode A mode to set
|
||||
*
|
||||
* \return The status of mode setting.
|
||||
*/
|
||||
int32_t usart_sync_set_mode(struct usart_sync_descriptor *const descr, const enum usart_mode mode);
|
||||
|
||||
/**
|
||||
* \brief Set USART parity
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] parity A parity to set
|
||||
*
|
||||
* \return The status of parity setting.
|
||||
*/
|
||||
int32_t usart_sync_set_parity(struct usart_sync_descriptor *const descr, const enum usart_parity parity);
|
||||
|
||||
/**
|
||||
* \brief Set USART stop bits
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] stop_bits Stop bits to set
|
||||
*
|
||||
* \return The status of stop bits setting.
|
||||
*/
|
||||
int32_t usart_sync_set_stopbits(struct usart_sync_descriptor *const descr, const enum usart_stop_bits stop_bits);
|
||||
|
||||
/**
|
||||
* \brief Set USART character size
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] size A character size to set
|
||||
*
|
||||
* \return The status of character size setting.
|
||||
*/
|
||||
int32_t usart_sync_set_character_size(struct usart_sync_descriptor *const descr, const enum usart_character_size size);
|
||||
|
||||
/**
|
||||
* \brief Retrieve the state of flow control pins
|
||||
*
|
||||
* This function retrieves the of flow control pins
|
||||
* if the flow control is enabled.
|
||||
* Function can return USART_FLOW_CONTROL_STATE_UNAVAILABLE in case
|
||||
* if the flow control is done by the hardware
|
||||
* and the pins state cannot be read out.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[out] state The state of flow control pins
|
||||
*
|
||||
* \return The status of flow control state reading.
|
||||
*/
|
||||
int32_t usart_sync_flow_control_status(const struct usart_sync_descriptor *const descr,
|
||||
union usart_flow_control_state *const state);
|
||||
|
||||
/**
|
||||
* \brief Check if the USART transmitter is empty
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return The status of USART TX empty checking.
|
||||
* \retval 0 The USART transmitter is not empty
|
||||
* \retval 1 The USART transmitter is empty
|
||||
*/
|
||||
int32_t usart_sync_is_tx_empty(const struct usart_sync_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Check if the USART receiver is not empty
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return The status of USART RX empty checking.
|
||||
* \retval 1 The USART receiver is not empty
|
||||
* \retval 0 The USART receiver is empty
|
||||
*/
|
||||
int32_t usart_sync_is_rx_not_empty(const struct usart_sync_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Retrieve the current driver version
|
||||
*
|
||||
* \return Current driver version.
|
||||
*/
|
||||
uint32_t usart_sync_get_version(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/**@}*/
|
||||
#endif /* _HAL_SYNC_USART_H_INCLUDED */
|
||||
265
watch-library/hal/include/hpl_flash.h
Executable file
265
watch-library/hal/include/hpl_flash.h
Executable file
@@ -0,0 +1,265 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief FLASH related functionality declaration.
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
#ifndef _HPL_FLASH_H_INCLUDED
|
||||
#define _HPL_FLASH_H_INCLUDED
|
||||
|
||||
/**
|
||||
* \addtogroup hpl__flash__group FLASH HPL APIs
|
||||
*
|
||||
*/
|
||||
|
||||
/**@{*/
|
||||
|
||||
#include <compiler.h>
|
||||
#include "hpl_irq.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief FLASH device structure
|
||||
*
|
||||
* The FLASH device structure forward declaration.
|
||||
*/
|
||||
struct _flash_device;
|
||||
|
||||
/** The callback types */
|
||||
enum _flash_cb_type { FLASH_DEVICE_CB_READY, FLASH_DEVICE_CB_ERROR, FLASH_DEVICE_CB_N };
|
||||
|
||||
/**
|
||||
* \brief FLASH interrupt handlers structure
|
||||
*/
|
||||
struct _flash_callback {
|
||||
/** Ready to accept new command handler */
|
||||
void (*ready_cb)(struct _flash_device *device);
|
||||
/** Error handler */
|
||||
void (*error_cb)(struct _flash_device *device);
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief FLASH descriptor device structure.
|
||||
*/
|
||||
struct _flash_device {
|
||||
struct _flash_callback flash_cb; /*!< Interrupt handers */
|
||||
struct _irq_descriptor irq; /*!< Interrupt descriptor */
|
||||
void * hw; /*!< Hardware module instance handler */
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Initialize FLASH.
|
||||
*
|
||||
* This function does low level FLASH configuration.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] hw The pointer to hardware instance
|
||||
*
|
||||
* \return Initialize status.
|
||||
*/
|
||||
int32_t _flash_init(struct _flash_device *const device, void *const hw);
|
||||
|
||||
/**
|
||||
* \brief Deinitialize FLASH.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
*/
|
||||
void _flash_deinit(struct _flash_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Reads a number of bytes in the internal Flash.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] src_addr Source bytes address to read from flash
|
||||
* \param[out] buffer Pointer to a buffer where the content
|
||||
* of the read page will be stored
|
||||
* \param[in] length Number of bytes to read
|
||||
*/
|
||||
void _flash_read(struct _flash_device *const device, const uint32_t src_addr, uint8_t *buffer, uint32_t length);
|
||||
|
||||
/**
|
||||
* \brief Writes a number of bytes in the internal Flash.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] dst_addr Destination bytes address to write into flash
|
||||
* \param[in] buffer Pointer to buffer where the data to
|
||||
* write is stored
|
||||
* \param[in] length Number of bytes to write
|
||||
*/
|
||||
void _flash_write(struct _flash_device *const device, const uint32_t dst_addr, uint8_t *buffer, uint32_t length);
|
||||
|
||||
/**
|
||||
* \brief Appends a number of bytes in the internal Flash.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] dst_addr Destination bytes address to write into flash
|
||||
* \param[in] buffer Pointer to buffer with data to write to flash
|
||||
* \param[in] length Number of bytes to write
|
||||
*/
|
||||
void _flash_append(struct _flash_device *const device, const uint32_t dst_addr, uint8_t *buffer, uint32_t length);
|
||||
|
||||
/** \brief Execute lock in the internal flash
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] dst_addr Destination bytes address aligned with page
|
||||
* start to be locked
|
||||
* \param[in] page_nums Number of pages to be locked
|
||||
*
|
||||
* \return Real locked numbers of pages.
|
||||
*/
|
||||
int32_t _flash_lock(struct _flash_device *const device, const uint32_t dst_addr, uint32_t page_nums);
|
||||
|
||||
/** \brief Execute unlock in the internal flash
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] dst_addr Destination bytes address aligned with page
|
||||
* start to be unlocked
|
||||
* \param[in] page_nums Number of pages to be unlocked
|
||||
*
|
||||
* \return Real unlocked numbers of pages.
|
||||
*/
|
||||
int32_t _flash_unlock(struct _flash_device *const device, const uint32_t dst_addr, uint32_t page_nums);
|
||||
|
||||
/** \brief check whether the region which is pointed by address
|
||||
* is locked
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] dst_addr Destination bytes address to check
|
||||
*
|
||||
* \return The lock status of assigned address.
|
||||
*/
|
||||
bool _flash_is_locked(struct _flash_device *const device, const uint32_t dst_addr);
|
||||
|
||||
/** \brief Execute erase in the internal flash
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] dst_addr Destination bytes address aligned with page
|
||||
* start to be erased
|
||||
* \param[in] page_nums Number of pages to be erased
|
||||
*/
|
||||
void _flash_erase(struct _flash_device *const device, const uint32_t dst_addr, uint32_t page_nums);
|
||||
|
||||
/**
|
||||
* \brief Get the flash page size.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
*
|
||||
* \return The flash page size
|
||||
*/
|
||||
uint32_t _flash_get_page_size(struct _flash_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Get the numbers of flash page.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
*
|
||||
* \return The flash total page numbers
|
||||
*/
|
||||
uint32_t _flash_get_total_pages(struct _flash_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Get the number of wait states for read and write operations.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
*
|
||||
* \return The number of wait states for read and write operations
|
||||
*/
|
||||
uint8_t _flash_get_wait_state(struct _flash_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Set the number of wait states for read and write operations.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] state The number of wait states
|
||||
*
|
||||
*/
|
||||
void _flash_set_wait_state(struct _flash_device *const device, uint8_t state);
|
||||
|
||||
/**
|
||||
* \brief Enable/disable Flash interrupt
|
||||
*
|
||||
* param[in] device The pointer to Flash device instance
|
||||
* param[in] type The type of interrupt to disable/enable if applicable
|
||||
* param[in] state Enable or disable
|
||||
*/
|
||||
void _flash_set_irq_state(struct _flash_device *const device, const enum _flash_cb_type type, const bool state);
|
||||
|
||||
/*
|
||||
* Below RWW flash APIs are only available for device which has RWWEE
|
||||
* flash array, such as SAM C20/C21/D21/L21/L22/R30/DA1/HA1 etc.
|
||||
*/
|
||||
/**
|
||||
* \brief Get the RWWEE flash page size.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
*
|
||||
* \return The flash page size
|
||||
*/
|
||||
uint32_t _rww_flash_get_page_size(struct _flash_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Get the total page numbers of RWWEE flash.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
*
|
||||
* \return The flash total page numbers
|
||||
*/
|
||||
uint32_t _rww_flash_get_total_pages(struct _flash_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Reads a number of bytes in the internal RWWEE Flash.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] src_addr Source bytes address to read from flash
|
||||
* \param[out] buffer Pointer to a buffer where the content
|
||||
* of the read page will be stored
|
||||
* \param[in] length Number of bytes to read
|
||||
*
|
||||
* \return Read status, ERR_NONE for successful read.
|
||||
*/
|
||||
int32_t _rww_flash_read(struct _flash_device *const device, const uint32_t src_addr, uint8_t *buffer, uint32_t length);
|
||||
|
||||
/**
|
||||
* \brief Writes a number of bytes in the internal RWWEE Flash.
|
||||
*
|
||||
* \param[in] device The pointer to FLASH device instance
|
||||
* \param[in] dst_addr Destination bytes address to write into flash
|
||||
* \param[in] buffer Pointer to buffer where the data to
|
||||
* write is stored
|
||||
* \param[in] length Number of bytes to write
|
||||
*
|
||||
* \return Write status, ERR_NONE for successful write.
|
||||
*/
|
||||
int32_t _rww_flash_write(struct _flash_device *const device, const uint32_t dst_addr, uint8_t *buffer, uint32_t length);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**@}*/
|
||||
|
||||
#endif /* _HPL_FLASH_H_INCLUDED */
|
||||
99
watch-library/hal/include/hpl_rand_sync.h
Executable file
99
watch-library/hal/include/hpl_rand_sync.h
Executable file
@@ -0,0 +1,99 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Random Number Generator (RAND) related functionality declaration.
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _HPL_RAND_SYNC_H_INCLUDED
|
||||
#define _HPL_RAND_SYNC_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** Random Number Generator polling device. */
|
||||
struct _rand_sync_dev {
|
||||
/** Pointer to private data or hardware base */
|
||||
void *prvt;
|
||||
/** Number of bits generated for each read operation */
|
||||
uint8_t n_bits;
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Initialize the Random Number Generator Driver
|
||||
* \param[out] dev Pointer to the device instance struct
|
||||
* \param[in, out] hw Pointer to the hardware for device instance
|
||||
* \return Initialization operation result status, 0 for OK.
|
||||
*/
|
||||
int32_t _rand_sync_init(struct _rand_sync_dev *const dev, void *const hw);
|
||||
|
||||
/**
|
||||
* \brief Deinitialize the Random Number Generator Driver
|
||||
* \param[in, out] dev Pointer to the device instance struct
|
||||
*/
|
||||
void _rand_sync_deinit(struct _rand_sync_dev *const dev);
|
||||
|
||||
/**
|
||||
* \brief Enable the Random Number Generator Driver
|
||||
* \param[out] dev Pointer to the device instance struct
|
||||
* \return Enable operation result status, 0 for OK.
|
||||
*/
|
||||
int32_t _rand_sync_enable(struct _rand_sync_dev *const dev);
|
||||
|
||||
/**
|
||||
* \brief Disable the Random Number Generator Driver
|
||||
* \param[out] dev Pointer to the device instance struct
|
||||
*/
|
||||
void _rand_sync_disable(struct _rand_sync_dev *const dev);
|
||||
|
||||
/**
|
||||
* \brief Set seed for the Random Number Generator Driver
|
||||
* \param[out] dev Pointer to the device instance struct
|
||||
* \param[in] seed The seed to set
|
||||
* \return Operation result
|
||||
* \retval ERR_NONE Operation complete success
|
||||
* \retval ERR_UNSUPPORTED_OP Seed not supported
|
||||
*/
|
||||
int32_t _rand_sync_set_seed(struct _rand_sync_dev *const dev, const uint32_t seed);
|
||||
|
||||
/**
|
||||
* \brief Polling random number until it's read back
|
||||
* \param[in] dev Pointer to the device instance struct
|
||||
* \return The random number value
|
||||
*/
|
||||
uint32_t _rand_sync_read_one(const struct _rand_sync_dev *const dev);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/**@}*/
|
||||
#endif /* _HPL_RAND_SYNC_H_INCLUDED */
|
||||
88
watch-library/hal/include/hpl_spi_dma.h
Executable file
88
watch-library/hal/include/hpl_spi_dma.h
Executable file
@@ -0,0 +1,88 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Common SPI DMA related functionality declaration.
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _HPL_SPI_DMA_H_INCLUDED
|
||||
#define _HPL_SPI_DMA_H_INCLUDED
|
||||
|
||||
#include <hpl_irq.h>
|
||||
#include <hpl_dma.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** The callback types */
|
||||
enum _spi_dma_dev_cb_type {
|
||||
/** Callback type for DMA transmit. */
|
||||
SPI_DEV_CB_DMA_TX,
|
||||
/** Callback type for DMA receive. */
|
||||
SPI_DEV_CB_DMA_RX,
|
||||
/** Callback type for DMA error. */
|
||||
SPI_DEV_CB_DMA_ERROR,
|
||||
/** Number of callbacks. */
|
||||
SPI_DEV_CB_DMA_N
|
||||
};
|
||||
|
||||
struct _spi_dma_dev;
|
||||
|
||||
/**
|
||||
* \brief The prototype for callback on SPI DMA.
|
||||
*/
|
||||
typedef void (*_spi_dma_cb_t)(struct _dma_resource *resource);
|
||||
|
||||
/**
|
||||
* \brief The callbacks offered by SPI driver
|
||||
*/
|
||||
struct _spi_dma_dev_callbacks {
|
||||
_spi_dma_cb_t tx;
|
||||
_spi_dma_cb_t rx;
|
||||
_spi_dma_cb_t error;
|
||||
};
|
||||
|
||||
/** SPI driver to support DMA HAL */
|
||||
struct _spi_dma_dev {
|
||||
/** Pointer to the hardware base or private data for special device. */
|
||||
void *prvt;
|
||||
/** Pointer to callback functions */
|
||||
struct _spi_dma_dev_callbacks callbacks;
|
||||
/** IRQ instance for SPI device. */
|
||||
struct _irq_descriptor irq;
|
||||
/** DMA resource */
|
||||
struct _dma_resource *resource;
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _HPL_SPI_DMA_H_INCLUDED */
|
||||
123
watch-library/hal/include/hpl_user_area.h
Executable file
123
watch-library/hal/include/hpl_user_area.h
Executable file
@@ -0,0 +1,123 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Special user data area access
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _HPL_USER_DATA_H_INCLUDED
|
||||
#define _HPL_USER_DATA_H_INCLUDED
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Read data from user data area
|
||||
*
|
||||
* The user data area could be the area that stores user data that is not erased
|
||||
* with the flash contents, e.g.,
|
||||
* - NVM Software Calibration Area of SAM D/L/C family
|
||||
* - User Signature of SAM E/S/V 70
|
||||
*
|
||||
* \param[in] base The base address of the user area
|
||||
* \param[in] offset The byte offset of the data to be read inside the area
|
||||
* \param[out] buf Pointer to buffer to place the read data
|
||||
* \param[in] size Size of data in number of bytes
|
||||
*
|
||||
* \return Operation status or bytes read.
|
||||
* \retval ERR_NONE Data read successfully
|
||||
* \retval ERR_UNSUPPORTED_OP base address not in any supported user area
|
||||
* \retval ERR_BAD_ADDRESS offset not in right area
|
||||
* \retval ERR_INVALID_ARG offset and size exceeds the right area
|
||||
*/
|
||||
int32_t _user_area_read(const void *base, const uint32_t offset, uint8_t *buf, const uint32_t size);
|
||||
|
||||
/**
|
||||
* \brief Read no more than 32 bits data from user data area
|
||||
*
|
||||
* When reading bits, the bitfield can cross 32-bis boundaries.
|
||||
*
|
||||
* \param[in] base The base address of the user area
|
||||
* \param[in] bit_offset Offset in number of bits
|
||||
* \param[in] n_bits Number of bits to read
|
||||
* \return data read, assert if anything wrong (address not in user area
|
||||
* offset, size error, etc.).
|
||||
*/
|
||||
uint32_t _user_area_read_bits(const void *base, const uint32_t bit_offset, const uint8_t n_bits);
|
||||
|
||||
/**
|
||||
* \brief Write data to user data area
|
||||
*
|
||||
* The user data area could be the area that stores user data that is not erased
|
||||
* with the flash contents, e.g.,
|
||||
* - NVM Software Calibration Area of SAM D/L/C family
|
||||
* - User Signature of SAM E/S/V 70
|
||||
*
|
||||
* When assigned offset and size exceeds the data area, error is reported.
|
||||
*
|
||||
* \param[out] base The base address of the user area
|
||||
* \param[in] offset The offset of the data to be written inside the area
|
||||
* \param[in] buf Pointer to buffer to place the written data
|
||||
* \param[in] size Size of data in number of bytes
|
||||
*
|
||||
* \return Operation status or bytes writting.
|
||||
* \retval ERR_NONE Data written successfully
|
||||
* \retval ERR_UNSUPPORTED_OP base address not in any supported user area
|
||||
* \retval ERR_DENIED Security bit is set
|
||||
* \retval ERR_BAD_ADDRESS offset not in right area
|
||||
* \retval ERR_INVALID_ARG offset and size exceeds the right area
|
||||
*/
|
||||
int32_t _user_area_write(void *base, const uint32_t offset, const uint8_t *buf, const uint32_t size);
|
||||
|
||||
/**
|
||||
* \brief Write no more than 32 bits data to user data area
|
||||
*
|
||||
* When writting bits, the bitfield can cross 32-bis boundaries.
|
||||
*
|
||||
* \param[out] base The base address of the user area
|
||||
* \param[in] bit_offset Offset in number of bits
|
||||
* \param[in] bits The data content
|
||||
* \param[in] n_bits Number of bits to write
|
||||
* \return Operation result
|
||||
* \retval ERR_NONE Data written successfully
|
||||
* \retval ERR_UNSUPPORTED_OP base address not in any supported user area
|
||||
* \retval ERR_DENIED Security bit is set
|
||||
* \retval ERR_BAD_ADDRESS offset not in right area
|
||||
* \retval ERR_INVALID_ARG offset and size exceeds the right area
|
||||
*/
|
||||
int32_t _user_area_write_bits(void *base, const uint32_t bit_offset, const uint32_t bits, const uint8_t n_bits);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _HPL_USER_DATA_H_INCLUDED */
|
||||
Reference in New Issue
Block a user