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static analysis: add comments to empty while loops

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This commit is contained in:
Joey Castillo 2022-04-10 15:07:58 -04:00
parent 7b06d7d6fd
commit 405f010ade
3 changed files with 5 additions and 5 deletions
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2
watch-library/hardware/watch/watch_adc.c
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@ -36,7 +36,7 @@ static uint16_t _watch_get_analog_value(uint16_t channel) {
} }
ADC->SWTRIG.bit.START = 1; ADC->SWTRIG.bit.START = 1;
while (!ADC->INTFLAG.bit.RESRDY); while (!ADC->INTFLAG.bit.RESRDY); // wait for "result ready" flag
return ADC->RESULT.reg; return ADC->RESULT.reg;
} }

2
watch-library/hardware/watch/watch_deepsleep.c
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@ -69,7 +69,7 @@ void watch_register_extwake_callback(uint8_t pin, ext_irq_cb_t callback, bool le
// disable the RTC // disable the RTC
RTC->MODE2.CTRLA.bit.ENABLE = 0; RTC->MODE2.CTRLA.bit.ENABLE = 0;
while (RTC->MODE2.SYNCBUSY.bit.ENABLE); while (RTC->MODE2.SYNCBUSY.bit.ENABLE); // wait for RTC to be disabled
// update the configuration // update the configuration
RTC->MODE2.TAMPCTRL.reg = config; RTC->MODE2.TAMPCTRL.reg = config;

6
watch-library/hardware/watch/watch_private.c
View File

@ -35,7 +35,7 @@ void _watch_init(void) {
// Use switching regulator for lower power consumption. // Use switching regulator for lower power consumption.
SUPC->VREG.bit.SEL = 1; SUPC->VREG.bit.SEL = 1;
while(!SUPC->STATUS.bit.VREGRDY); while(!SUPC->STATUS.bit.VREGRDY); // wait for voltage regulator to become ready
// check the battery voltage... // check the battery voltage...
watch_enable_adc(); watch_enable_adc();
@ -63,7 +63,7 @@ void _watch_init(void) {
SUPC->BOD33.bit.LEVEL = 34; // Detect brownout at 2.6V (1.445V + level * 34mV) SUPC->BOD33.bit.LEVEL = 34; // Detect brownout at 2.6V (1.445V + level * 34mV)
SUPC->BOD33.bit.ACTION = 0x2; // Generate an interrupt when BOD33 is triggered SUPC->BOD33.bit.ACTION = 0x2; // Generate an interrupt when BOD33 is triggered
SUPC->BOD33.bit.HYST = 0; // Disable hysteresis SUPC->BOD33.bit.HYST = 0; // Disable hysteresis
while(!SUPC->STATUS.bit.B33SRDY); while(!SUPC->STATUS.bit.B33SRDY); // wait for BOD33 to sync
// Enable interrupt on BOD33 detect // Enable interrupt on BOD33 detect
SUPC->INTENSET.bit.BOD33DET = 1; SUPC->INTENSET.bit.BOD33DET = 1;
@ -198,7 +198,7 @@ void _watch_enable_usb(void) {
// assign DFLL to GCLK1 // assign DFLL to GCLK1
GCLK->GENCTRL[1].reg = GCLK_GENCTRL_SRC(GCLK_GENCTRL_SRC_DFLL48M) | GCLK_GENCTRL_DIV(1) | GCLK_GENCTRL_GENEN;// | GCLK_GENCTRL_OE; GCLK->GENCTRL[1].reg = GCLK_GENCTRL_SRC(GCLK_GENCTRL_SRC_DFLL48M) | GCLK_GENCTRL_DIV(1) | GCLK_GENCTRL_GENEN;// | GCLK_GENCTRL_OE;
while (GCLK->SYNCBUSY.bit.GENCTRL1); while (GCLK->SYNCBUSY.bit.GENCTRL1); // wait for generator control 1 to sync
// assign GCLK1 to USB // assign GCLK1 to USB
hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);