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USB Improvements

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* Introduce shell module for basic serial shell with argument parsing
* Introduce shell_cmd_list module for basic compile-time command
  registration
* Harden USB handling to hang less and drop fewer inputs
  - Service tud_task() with periodic TC0 timer interrupt
  - Service cdc_task() with periodic TC1 timer interrupt
  - Handle shell servicing in main app loop
  - Add a circular buffering layer for reads/writes
* Change newline prints to also send carriage return
* Refactor filesystem commands for shell subsystem
* Introduce new shell commands:
  - 'help' command
  - 'flash' command to reset into bootloader
  - 'stress' command to stress CDC writes

Testing:
* Shell validated on Sensor Watch Blue w/ Linux host
* Shell validated in emscripten emulator
* Tuned by spamming inputs during `stress` cmd until stack didn't crash
This commit is contained in:
Edward Shin
2023-10-15 00:36:49 -04:00
parent 63d6bc6aa0
commit 5b762d0168
15 changed files with 820 additions and 160 deletions
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145
watch-library/hardware/watch/watch_private.c
View File

@@ -23,6 +23,7 @@
*/
#include "watch_private.h"
#include "watch_private_cdc.h"
#include "watch_utility.h"
#include "tusb.h"
@@ -170,6 +171,87 @@ void _watch_disable_tcc(void) {
// disable the TCC
hri_tcc_clear_CTRLA_ENABLE_bit(TCC0);
hri_mclk_clear_APBCMASK_TCC0_bit(MCLK);
}
void _watch_enable_tc0(void) {
// before we init TinyUSB, we are going to need a periodic callback to handle TinyUSB tasks.
// TC2 and TC3 are reserved for devices on the 9-pin connector, so let's use TC0.
// clock TC0 with the 8 MHz clock on GCLK0.
hri_gclk_write_PCHCTRL_reg(GCLK, TC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK0_Val | GCLK_PCHCTRL_CHEN);
// and enable the peripheral clock.
hri_mclk_set_APBCMASK_TC0_bit(MCLK);
// disable and reset TC0.
hri_tc_clear_CTRLA_ENABLE_bit(TC0);
hri_tc_wait_for_sync(TC0, TC_SYNCBUSY_ENABLE);
hri_tc_write_CTRLA_reg(TC0, TC_CTRLA_SWRST);
hri_tc_wait_for_sync(TC0, TC_SYNCBUSY_SWRST);
hri_tc_write_CTRLA_reg(TC0, TC_CTRLA_PRESCALER_DIV1024 | // divide the 8 MHz clock by 1024 to count at 7812.5 Hz
TC_CTRLA_MODE_COUNT8 | // count in 8-bit mode
TC_CTRLA_RUNSTDBY); // run in standby, just in case we figure that out
hri_tccount8_write_PER_reg(TC0, 10); // 7812.5 Hz / 10 = 781.125 Hz
// set an interrupt on overflow; this will call TC0_Handler below.
hri_tc_set_INTEN_OVF_bit(TC0);
// set priority higher than TC1
NVIC_SetPriority(TC0_IRQn, 5);
NVIC_ClearPendingIRQ(TC0_IRQn);
NVIC_EnableIRQ(TC0_IRQn);
// Start the timer
hri_tc_set_CTRLA_ENABLE_bit(TC0);
}
void _watch_disable_tc0(void) {
NVIC_DisableIRQ(TC0_IRQn);
NVIC_ClearPendingIRQ(TC0_IRQn);
hri_tc_clear_CTRLA_ENABLE_bit(TC0);
hri_tc_wait_for_sync(TC0, TC_SYNCBUSY_ENABLE);
hri_tc_write_CTRLA_reg(TC0, TC_CTRLA_SWRST);
hri_tc_wait_for_sync(TC0, TC_SYNCBUSY_SWRST);
}
void _watch_enable_tc1(void) {
hri_gclk_write_PCHCTRL_reg(GCLK, TC1_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK0_Val | GCLK_PCHCTRL_CHEN);
// and enable the peripheral clock.
hri_mclk_set_APBCMASK_TC1_bit(MCLK);
// disable and reset TC1.
hri_tc_clear_CTRLA_ENABLE_bit(TC1);
hri_tc_wait_for_sync(TC1, TC_SYNCBUSY_ENABLE);
hri_tc_write_CTRLA_reg(TC1, TC_CTRLA_SWRST);
hri_tc_wait_for_sync(TC1, TC_SYNCBUSY_SWRST);
hri_tc_write_CTRLA_reg(TC1, TC_CTRLA_PRESCALER_DIV1024 | // divide the 8 MHz clock by 1024 to count at 7812.5 Hz
TC_CTRLA_MODE_COUNT8 | // count in 8-bit mode
TC_CTRLA_RUNSTDBY); // run in standby, just in case we figure that out
hri_tccount8_write_PER_reg(TC1, 20); // 7812.5 Hz / 50 = 156.25 Hz
// set an interrupt on overflow; this will call TC1_Handler below.
hri_tc_set_INTEN_OVF_bit(TC1);
// set priority lower than TC0
NVIC_SetPriority(TC1_IRQn, 6);
NVIC_ClearPendingIRQ(TC1_IRQn);
NVIC_EnableIRQ(TC1_IRQn);
// Start the timer
hri_tc_set_CTRLA_ENABLE_bit(TC1);
}
void _watch_disable_tc1(void) {
NVIC_DisableIRQ(TC1_IRQn);
NVIC_ClearPendingIRQ(TC1_IRQn);
hri_tc_clear_CTRLA_ENABLE_bit(TC1);
hri_tc_wait_for_sync(TC1, TC_SYNCBUSY_ENABLE);
hri_tc_write_CTRLA_reg(TC1, TC_CTRLA_SWRST);
hri_tc_wait_for_sync(TC1, TC_SYNCBUSY_SWRST);
}
void TC0_Handler(void) {
tud_task();
TC0->COUNT8.INTFLAG.reg |= TC_INTFLAG_OVF;
}
void TC1_Handler(void) {
cdc_task();
TC1->COUNT8.INTFLAG.reg |= TC_INTFLAG_OVF;
}
void _watch_enable_usb(void) {
@@ -216,76 +298,17 @@ void _watch_enable_usb(void) {
gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM);
gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP);
// before we init TinyUSB, we are going to need a periodic callback to handle TinyUSB tasks.
// TC2 and TC3 are reserved for devices on the 9-pin connector, so let's use TC0.
// clock TC0 with the 8 MHz clock on GCLK0.
hri_gclk_write_PCHCTRL_reg(GCLK, TC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK0_Val | GCLK_PCHCTRL_CHEN);
// and enable the peripheral clock.
hri_mclk_set_APBCMASK_TC0_bit(MCLK);
// disable and reset TC0.
hri_tc_clear_CTRLA_ENABLE_bit(TC0);
hri_tc_wait_for_sync(TC0, TC_SYNCBUSY_ENABLE);
hri_tc_write_CTRLA_reg(TC0, TC_CTRLA_SWRST);
hri_tc_wait_for_sync(TC0, TC_SYNCBUSY_SWRST);
// configure the TC to overflow 1,000 times per second
hri_tc_write_CTRLA_reg(TC0, TC_CTRLA_PRESCALER_DIV64 | // divide the 8 MHz clock by 64 to count at 125 KHz
TC_CTRLA_MODE_COUNT8 | // count in 8-bit mode
TC_CTRLA_RUNSTDBY); // run in standby, just in case we figure that out
hri_tccount8_write_PER_reg(TC0, 125); // 125000 Hz / 125 = 1,000 Hz
// set an interrupt on overflow; this will call TC0_Handler below.
hri_tc_set_INTEN_OVF_bit(TC0);
NVIC_ClearPendingIRQ(TC0_IRQn);
NVIC_EnableIRQ (TC0_IRQn);
_watch_enable_tc0();
// now we can init TinyUSB
tusb_init();
// and start the timer that handles USB device tasks.
hri_tc_set_CTRLA_ENABLE_bit(TC0);
}
// this function ends up getting called by printf to log stuff to the USB console.
int _write(int file, char *ptr, int len) {
(void)file;
if (hri_usbdevice_get_CTRLA_ENABLE_bit(USB)) {
tud_cdc_n_write(0, (void const*)ptr, len);
tud_cdc_n_write_flush(0);
return len;
}
return 0;
}
static char buf[256] = {0};
int _read(int file, char *ptr, int len) {
(void)file;
int actual_length = strlen(buf);
if (actual_length) {
memcpy(ptr, buf, min(len, actual_length));
return actual_length;
}
return 0;
_watch_enable_tc1();
}
void USB_Handler(void) {
tud_int_handler(0);
}
static void cdc_task(void) {
if (tud_cdc_n_available(0)) {
tud_cdc_n_read(0, buf, sizeof(buf));
} else {
memset(buf, 0, 256);
}
}
void TC0_Handler(void) {
tud_task();
cdc_task();
TC0->COUNT8.INTFLAG.reg |= TC_INTFLAG_OVF;
}
// USB Descriptors and tinyUSB callbacks follow.
/*