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osc32kctrl: implement CONF_SLCDCTRL_SRC setting

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This commit is contained in:
Joey Castillo 2022-02-11 12:22:11 -05:00
parent 74f8747764
commit 5dac14974c
2 changed files with 5 additions and 3 deletions
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2
watch-library/hardware/hpl/osc32kctrl/hpl_osc32kctrl.c
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@ -82,5 +82,7 @@ void _osc32kctrl_init_sources(void)
#endif
hri_osc32kctrl_write_RTCCTRL_reg(hw, OSC32KCTRL_RTCCTRL_RTCSEL(CONF_RTCCTRL));
hri_osc32kctrl_write_SLCDCTRL_SLCDSEL_bit(hw, CONF_SLCDCTRL_SRC);
(void)calib;
}

6
watch-library/shared/config/hpl_osc32kctrl_config.h
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@ -50,12 +50,12 @@
// <h> SLCD source control
// <y> SLCD Clock Source Selection
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
// <0> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
// <1> 32kHz External Crystal Oscillator (XOSC32K)
// <i> This defines the clock source for SLCD
// <id> slcd_source_oscillator
#ifndef CONF_SLCDCTRL_SRC
#define CONF_SLCDCTRL_SRC GCLK_GENCTRL_SRC_XOSC32K
#define CONF_SLCDCTRL_SRC 0
#endif
// </h>