diff --git a/Makefile b/Makefile
index 8cab5036..e1c98e91 100644
--- a/Makefile
+++ b/Makefile
@@ -43,6 +43,7 @@ SRCS += \
   ./watch-library/hardware/watch/watch_private.c \
   ./watch-library/hardware/watch/watch_rtc.c \
   ./watch-library/hardware/watch/watch_slcd.c \
+  ./watch-library/hardware/watch/watch_storage.c \
   ./watch-library/hardware/watch/watch_tcc.c \
   ./watch-library/hardware/watch/watch_usb_descriptors.c \
   ./watch-library/hardware/watch/watch_usb_cdc.c \
diff --git a/watch-library/hardware/watch/watch_storage.c b/watch-library/hardware/watch/watch_storage.c
index 6c87be53..bc7dc7e7 100644
--- a/watch-library/hardware/watch/watch_storage.c
+++ b/watch-library/hardware/watch/watch_storage.c
@@ -56,7 +56,7 @@ bool watch_storage_write(uint32_t row, uint32_t offset, const uint8_t *buffer, u
     uint32_t nvm_address = address / 2;
     uint16_t i, data;
 
-    hri_nvmctrl_write_CTRLA_reg(NVMCTRL, NVMCTRL_CTRLA_CMD_PBC | NVMCTRL_CTRLA_CMDEX_KEY);
+    NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_PBC | NVMCTRL_CTRLA_CMDEX_KEY;
     watch_storage_sync();
 
     for (i = 0; i < size; i += 2) {
@@ -66,8 +66,8 @@ bool watch_storage_write(uint32_t row, uint32_t offset, const uint8_t *buffer, u
         }
         NVM_MEMORY[nvm_address++] = data;
     }
-    hri_nvmctrl_write_ADDR_reg(NVMCTRL, address / 2);
-    hri_nvmctrl_write_CTRLA_reg(NVMCTRL, NVMCTRL_CTRLA_CMD_RWWEEWP | NVMCTRL_CTRLA_CMDEX_KEY);
+    NVMCTRL->ADDR.reg = address / 2;
+    NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_RWWEEWP | NVMCTRL_CTRLA_CMDEX_KEY;
 
     return true;
 }
@@ -77,18 +77,18 @@ bool watch_storage_erase(uint32_t row) {
     if (!_is_valid_address(address, NVMCTRL_ROW_SIZE)) return false;
 
     watch_storage_sync();
-    hri_nvmctrl_write_ADDR_reg(NVMCTRL, address / 2);
-    hri_nvmctrl_write_CTRLA_reg(NVMCTRL, NVMCTRL_CTRLA_CMD_RWWEEER | NVMCTRL_CTRLA_CMDEX_KEY);
+    NVMCTRL->ADDR.reg = address / 2;
+    NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_RWWEEER | NVMCTRL_CTRLA_CMDEX_KEY;
 
     return true;
 }
 
 bool watch_storage_sync(void) {
-    while (!hri_nvmctrl_get_interrupt_READY_bit(NVMCTRL)) {
+    while (!NVMCTRL->INTFLAG.bit.READY) {
         // wait for flash to become ready
     }
 
-    hri_nvmctrl_clear_STATUS_reg(NVMCTRL, NVMCTRL_STATUS_MASK);
+    NVMCTRL->STATUS.reg = NVMCTRL_STATUS_MASK;
 
     return true;
 }
diff --git a/watch-library/shared/watch/watch.h b/watch-library/shared/watch/watch.h
index f856f401..805686e1 100644
--- a/watch-library/shared/watch/watch.h
+++ b/watch-library/shared/watch/watch.h
@@ -70,7 +70,7 @@ typedef void (*watch_cb_t)(void);
 // #include "watch_i2c.h"
 // #include "watch_spi.h"
 // #include "watch_uart.h"
-// #include "watch_storage.h"
+#include "watch_storage.h"
 #include "watch_deepsleep.h"
 
 /** @brief Interrupt handler for the SYSTEM interrupt, which handles MCLK,
diff --git a/watch-library/shared/watch/watch_storage.h b/watch-library/shared/watch/watch_storage.h
index 6026cbcf..e8d62d5c 100644
--- a/watch-library/shared/watch/watch_storage.h
+++ b/watch-library/shared/watch/watch_storage.h
@@ -21,8 +21,9 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  * SOFTWARE.
  */
-#ifndef _WATCH_STORAGE_H_INCLUDED
-#define _WATCH_STORAGE_H_INCLUDED
+
+#pragma once
+
 ////< @file watch_storage.h
 
 #include "watch.h"
@@ -89,4 +90,3 @@ bool watch_storage_erase(uint32_t row);
   */
 bool watch_storage_sync(void);
 /// @}
-#endif