WIP low power seconds update
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@ -170,6 +170,26 @@ void app_setup() {
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alarm_time.unit.second = 59; // after a match, the alarm fires at the next rising edge of CLK_RTC_CNT, so 59 seconds lets us update at :00
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alarm_time.unit.second = 59; // after a match, the alarm fires at the next rising edge of CLK_RTC_CNT, so 59 seconds lets us update at :00
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watch_rtc_register_alarm_callback(cb_alarm_fired, alarm_time, ALARM_MATCH_SS);
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watch_rtc_register_alarm_callback(cb_alarm_fired, alarm_time, ALARM_MATCH_SS);
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}
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}
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// set up our low-power timer/counter for custom tick intervals
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// why is it low-power? because we clock it from the 32768 Hz GCLK3!
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hri_gclk_write_PCHCTRL_reg(GCLK, TC2_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK3_Val | GCLK_PCHCTRL_CHEN);
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hri_mclk_set_APBCMASK_TC2_bit(MCLK);
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hri_tc_clear_CTRLA_ENABLE_bit(TC2); // disable it
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hri_tc_wait_for_sync(TC2, TC_SYNCBUSY_ENABLE); // wait for it to be disabled
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hri_tc_write_CTRLA_reg(TC2, TC_CTRLA_SWRST); // reset it
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hri_tc_wait_for_sync(TC2, TC_SYNCBUSY_SWRST); // wait for it to be reset
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// cool. now configure it:
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hri_tc_write_CTRLA_reg(TC2, TC_CTRLA_PRESCALER_DIV256 | // divide the 32768 Hz input by 256 to count at 128 Hz
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TC_CTRLA_MODE_COUNT8 | // count in 8-bit mode
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TC_CTRLA_RUNSTDBY); // run in standby since this will time our waking up from standby.
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hri_tccount8_write_PER_reg(TC2, 32); // 128 / 256 = 1 Hz
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// set an interrupt when the value overflows PER. This is our tick, and it will call TC2_Handler below.
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hri_tc_set_INTEN_OVF_bit(TC2);
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NVIC_ClearPendingIRQ(TC2_IRQn);
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NVIC_EnableIRQ(TC2_IRQn);
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hri_tc_set_CTRLA_ENABLE_bit(TC2);
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if (movement_state.le_mode_ticks != -1) {
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if (movement_state.le_mode_ticks != -1) {
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watch_disable_extwake_interrupt(BTN_ALARM);
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watch_disable_extwake_interrupt(BTN_ALARM);
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@ -194,6 +214,10 @@ void app_setup() {
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}
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}
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}
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}
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void TC2_Handler(void) {
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printf("TICK!\n");
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TC2->COUNT8.INTFLAG.reg |= TC_INTFLAG_OVF;
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}
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void app_prepare_for_standby() {
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void app_prepare_for_standby() {
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}
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}
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