remove timer; tick based on RTC PER7 interrupt
This commit is contained in:
@@ -4,177 +4,6 @@
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// <<< Use Configuration Wizard in Context Menu >>>
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#ifndef CONF_TC0_ENABLE
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#define CONF_TC0_ENABLE 1
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#endif
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#include "peripheral_clk_config.h"
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// <h> Basic configuration
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// <o> Prescaler
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// <0x0=> No division
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// <0x1=> Divide by 2
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// <0x2=> Divide by 4
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// <0x3=> Divide by 8
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// <0x4=> Divide by 16
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// <0x5=> Divide by 64
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// <0x6=> Divide by 256
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// <0x7=> Divide by 1024
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// <i> This defines the prescaler value
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// <id> timer_prescaler
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#ifndef CONF_TC0_PRESCALER
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#define CONF_TC0_PRESCALER 0x1
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#endif
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// <o> Length of one timer tick in uS <0-4294967295>
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// <id> timer_tick
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#ifndef CONF_TC0_TIMER_TICK
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#define CONF_TC0_TIMER_TICK 61
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#endif
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// </h>
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// <e> Advanced configuration
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// <id> timer_advanced_configuration
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#ifndef CONF_TC0__ADVANCED_CONFIGURATION_ENABLE
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#define CONF_TC0__ADVANCED_CONFIGURATION_ENABLE 1
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#endif
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// <y> Prescaler and Counter Synchronization Selection
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// <TC_CTRLA_PRESCSYNC_GCLK_Val"> Reload or reset counter on next GCLK
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// <TC_CTRLA_PRESCSYNC_PRESC_Val"> Reload or reset counter on next prescaler clock
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// <TC_CTRLA_PRESCSYNC_RESYNC_Val"> Reload or reset counter on next GCLK and reset prescaler counter
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// <i> These bits select if on retrigger event, the Counter should be cleared or reloaded on the next GCLK_TCx clock or on the next prescaled GCLK_TCx clock.
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// <id> tc_arch_presync
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#ifndef CONF_TC0_PRESCSYNC
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#define CONF_TC0_PRESCSYNC TC_CTRLA_PRESCSYNC_GCLK_Val
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#endif
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// <q> Run in standby
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// <i> Indicates whether the module will continue to run in standby sleep mode
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// <id> tc_arch_runstdby
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#ifndef CONF_TC0_RUNSTDBY
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#define CONF_TC0_RUNSTDBY 1
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#endif
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// <q> Run in debug mode
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// <i> Indicates whether the module will run in debug mode
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// <id> tc_arch_dbgrun
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#ifndef CONF_TC0_DBGRUN
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#define CONF_TC0_DBGRUN 0
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#endif
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// <q> Run on demand
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// <i> Run if requested by some other peripheral in the device
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// <id> tc_arch_ondemand
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#ifndef CONF_TC0_ONDEMAND
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#define CONF_TC0_ONDEMAND 0
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#endif
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// </e>
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// <e> Event control
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// <id> timer_event_control
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#ifndef CONF_TC0_EVENT_CONTROL_ENABLE
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#define CONF_TC0_EVENT_CONTROL_ENABLE 0
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#endif
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// <q> Output Event On Match or Capture on Channel 0
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// <i> Enable output of event on timer tick
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// <id> tc_arch_mceo0
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#ifndef CONF_TC0_MCEO0
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#define CONF_TC0_MCEO0 0
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#endif
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// <q> Output Event On Match or Capture on Channel 1
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// <i> Enable output of event on timer tick
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// <id> tc_arch_mceo1
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#ifndef CONF_TC0_MCEO1
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#define CONF_TC0_MCEO1 0
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#endif
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// <q> Output Event On Timer Tick
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// <i> Enable output of event on timer tick
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// <id> tc_arch_ovfeo
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#ifndef CONF_TC0_OVFEO
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#define CONF_TC0_OVFEO 0
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#endif
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// <q> Event Input
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// <i> Enable asynchronous input events
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// <id> tc_arch_tcei
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#ifndef CONF_TC0_TCEI
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#define CONF_TC0_TCEI 0
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#endif
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// <q> Inverted Event Input
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// <i> Invert the asynchronous input events
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// <id> tc_arch_tcinv
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#ifndef CONF_TC0_TCINV
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#define CONF_TC0_TCINV 0
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#endif
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// <o> Event action
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// <0=> Event action disabled
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// <1=> Start, restart or re-trigger TC on event
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// <2=> Count on event
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// <3=> Start on event
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// <4=> Time stamp capture
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// <5=> Period captured in CC0, pulse width in CC1
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// <6=> Period captured in CC1, pulse width in CC0
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// <7=> Pulse width capture
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// <i> Event which will be performed on an event
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//<id> tc_arch_evact
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#ifndef CONF_TC0_EVACT
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#define CONF_TC0_EVACT 0
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#endif
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// </e>
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// Default values which the driver needs in order to work correctly
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// Mode set to 32-bit
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#ifndef CONF_TC0_MODE
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#define CONF_TC0_MODE TC_CTRLA_MODE_COUNT32_Val
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#endif
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// CC 1 register set to 0
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#ifndef CONF_TC0_CC1
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#define CONF_TC0_CC1 0
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#endif
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#ifndef CONF_TC0_ALOCK
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#define CONF_TC0_ALOCK 0
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#endif
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// Not used in 32-bit mode
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#define CONF_TC0_PER 0
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// Calculating correct top value based on requested tick interval.
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#define CONF_TC0_PRESCALE (1 << CONF_TC0_PRESCALER)
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// Prescaler set to 64
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#if CONF_TC0_PRESCALER > 0x4
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#undef CONF_TC0_PRESCALE
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#define CONF_TC0_PRESCALE 64
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#endif
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// Prescaler set to 256
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#if CONF_TC0_PRESCALER > 0x5
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#undef CONF_TC0_PRESCALE
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#define CONF_TC0_PRESCALE 256
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#endif
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// Prescaler set to 1024
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#if CONF_TC0_PRESCALER > 0x6
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#undef CONF_TC0_PRESCALE
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#define CONF_TC0_PRESCALE 1024
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#endif
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#ifndef CONF_TC0_CC0
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#define CONF_TC0_CC0 \
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(uint32_t)(((float)CONF_TC0_TIMER_TICK / 1000000.f) / (1.f / (CONF_GCLK_TC0_FREQUENCY / CONF_TC0_PRESCALE)))
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#endif
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#include <peripheral_clk_config.h>
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#ifndef CONF_TC3_ENABLE
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@@ -145,32 +145,6 @@
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// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
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// <i> Select the clock source for TC.
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#ifndef CONF_GCLK_TC0_SRC
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#define CONF_GCLK_TC0_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
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#endif
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/**
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* \def CONF_GCLK_TC0_FREQUENCY
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* \brief TC0's Clock frequency
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*/
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#ifndef CONF_GCLK_TC0_FREQUENCY
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#define CONF_GCLK_TC0_FREQUENCY 32768
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#endif
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// <y> TC Clock Source
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// <id> tc_gclk_selection
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// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
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// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
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// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
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// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
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// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
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// <i> Select the clock source for TC.
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#ifndef CONF_GCLK_TC3_SRC
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#define CONF_GCLK_TC3_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
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