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work around silicon erratum in TRNG

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This commit is contained in:
Alex Maestas
2023-12-17 17:39:59 +00:00
parent 63d6bc6aa0
commit 89e86fe629
4 changed files with 18 additions and 4 deletions
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11
watch-library/hardware/watch/watch_private.c
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@@ -106,12 +106,21 @@ int getentropy(void *buf, size_t buflen) {
}
}
hri_trng_clear_CTRLA_ENABLE_bit(TRNG);
watch_disable_TRNG(TRNG);
hri_mclk_clear_APBCMASK_TRNG_bit(MCLK);
return 0;
}
void watch_disable_TRNG(Trng *hw) {
hri_trng_clear_CTRLA_ENABLE_bit(hw);
// silicon erratum: the TRNG may leave internal components powered after disable.
// the workaround is to clear the register twice.
hri_trng_write_CTRLA_reg(hw, 0);
hri_trng_write_CTRLA_reg(hw, 0);
}
void _watch_enable_tcc(void) {
// clock TCC0 with the main clock (8 MHz) and enable the peripheral clock.
hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK0_Val | GCLK_PCHCTRL_CHEN);

6
watch-library/shared/watch/watch.h
View File

@@ -96,4 +96,8 @@ void watch_reset_to_bootloader(void);
*/
int read(int file, char *ptr, int len);
#endif /* WATCH_H_ */
/** @brief Disables the TRNG, working around a silicon erratum.
*/
void watch_disable_TRNG(Trng* hw);
#endif /* WATCH_H_ */