use simple 8-bit counter for LED PWM
This commit is contained in:
39
Smol Watch Project/My Project/hpl/doc_lite/tc.rst
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39
Smol Watch Project/My Project/hpl/doc_lite/tc.rst
Normal file
@@ -0,0 +1,39 @@
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=========
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TC driver
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=========
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The TC consists of a counter, a prescaler, compare/capture channels and control logic. The counter can be set to count events, or it can be configured to count clock pulses. The counter, together with the compare/capture channels, can be configured to timestamp input events, allowing capture of frequency and pulse width. It can also perform waveform generation, such as frequency generation and pulse-width modulation (PWM)
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The timer/counter is clocked by the peripheral clock with optional prescaling or from the event system.
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Features
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--------
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* Initialization
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Applications
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------------
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* Frequency Generation
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* Single-slope PWM (pulse width modulation)
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* Dual-slope PWM
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* Count on event
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* Quadrature decoding
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Dependencies
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------------
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* CLK for clock
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* CPUINT/PMIC for Interrupt
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* EVSYS for events
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* UPDI/PDI/JTAG for debug
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* PORT for Waveform Generation
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Concurrency
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-----------
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N/A
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Limitations
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-----------
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N/A
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Knows issues and workarounds
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----------------------------
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N/A
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@@ -1,374 +0,0 @@
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/**
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* \file
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*
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* \brief SAM TC
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*
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* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Subject to your compliance with these terms, you may use Microchip
|
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* software and any derivatives exclusively with Microchip products.
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||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
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||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*
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* \asf_license_stop
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*
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*/
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#include <hpl_pwm.h>
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#include <hpl_tc_config.h>
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#include <hpl_timer.h>
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#include <utils.h>
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#include <utils_assert.h>
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#include <hpl_tc_base.h>
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#ifndef CONF_TC0_ENABLE
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#define CONF_TC0_ENABLE 0
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#endif
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#ifndef CONF_TC1_ENABLE
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#define CONF_TC1_ENABLE 0
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#endif
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#ifndef CONF_TC2_ENABLE
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#define CONF_TC2_ENABLE 0
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#endif
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#ifndef CONF_TC3_ENABLE
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#define CONF_TC3_ENABLE 0
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#endif
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#ifndef CONF_TC4_ENABLE
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#define CONF_TC4_ENABLE 0
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#endif
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#ifndef CONF_TC5_ENABLE
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#define CONF_TC5_ENABLE 0
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#endif
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#ifndef CONF_TC6_ENABLE
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#define CONF_TC6_ENABLE 0
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#endif
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#ifndef CONF_TC7_ENABLE
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#define CONF_TC7_ENABLE 0
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#endif
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/**
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* \brief Macro is used to fill usart configuration structure based on its
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* number
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*
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* \param[in] n The number of structures
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*/
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#define TC_CONFIGURATION(n) \
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{ \
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n, TC##n##_IRQn, \
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TC_CTRLA_MODE(CONF_TC##n##_MODE) | TC_CTRLA_PRESCSYNC(CONF_TC##n##_PRESCSYNC) \
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| (CONF_TC##n##_RUNSTDBY << TC_CTRLA_RUNSTDBY_Pos) | (CONF_TC##n##_ONDEMAND << TC_CTRLA_ONDEMAND_Pos) \
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| TC_CTRLA_PRESCALER(CONF_TC##n##_PRESCALER) | (CONF_TC##n##_ALOCK << TC_CTRLA_ALOCK_Pos), \
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(CONF_TC##n##_OVFEO << TC_EVCTRL_OVFEO_Pos) | (CONF_TC##n##_TCEI << TC_EVCTRL_TCEI_Pos) \
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| (CONF_TC##n##_TCINV << TC_EVCTRL_TCINV_Pos) | (CONF_TC##n##_EVACT << TC_EVCTRL_EVACT_Pos) \
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| (CONF_TC##n##_MCEO0 << TC_EVCTRL_MCEO0_Pos) | (CONF_TC##n##_MCEO1 << TC_EVCTRL_MCEO1_Pos), \
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(CONF_TC##n##_DBGRUN << TC_DBGCTRL_DBGRUN_Pos), CONF_TC##n##_PER, CONF_TC##n##_CC0, CONF_TC##n##_CC1, \
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}
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/**
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* \brief TC configuration type
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*/
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struct tc_configuration {
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uint8_t number;
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IRQn_Type irq;
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hri_tc_ctrla_reg_t ctrl_a;
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hri_tc_evctrl_reg_t event_ctrl;
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hri_tc_dbgctrl_reg_t dbg_ctrl;
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hri_tccount8_per_reg_t per;
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hri_tccount32_cc_reg_t cc0;
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hri_tccount32_cc_reg_t cc1;
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};
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/**
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* \brief Array of TC configurations
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*/
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static struct tc_configuration _tcs[] = {
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#if CONF_TC0_ENABLE == 1
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TC_CONFIGURATION(0),
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#endif
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#if CONF_TC1_ENABLE == 1
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TC_CONFIGURATION(1),
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#endif
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#if CONF_TC2_ENABLE == 1
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TC_CONFIGURATION(2),
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#endif
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#if CONF_TC3_ENABLE == 1
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TC_CONFIGURATION(3),
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#endif
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#if CONF_TC4_ENABLE == 1
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TC_CONFIGURATION(4),
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#endif
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#if CONF_TC5_ENABLE == 1
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TC_CONFIGURATION(5),
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#endif
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#if CONF_TC6_ENABLE == 1
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TC_CONFIGURATION(6),
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#endif
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#if CONF_TC7_ENABLE == 1
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TC_CONFIGURATION(7),
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#endif
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};
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/**
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* \brief Set of pointer to hal_pwm helper functions
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*/
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static struct _pwm_hpl_interface _tc_pwm_functions = {
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_tc_pwm_init,
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_tc_pwm_deinit,
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_tc_start_pwm,
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_tc_stop_pwm,
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_tc_set_pwm_param,
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_tc_is_pwm_enabled,
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_tc_pwm_get_period,
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_tc_pwm_get_duty,
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_tc_pwm_set_irq_state,
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};
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static struct _pwm_device *_tc3_dev = NULL;
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static int8_t get_tc_index(const void *const hw);
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static void _tc_init_irq_param(const void *const hw, void *dev);
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static inline uint8_t _get_hardware_offset(const void *const hw);
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/**
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* \brief Initialize TC for PWM mode
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*/
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int32_t _tc_pwm_init(struct _pwm_device *const device, void *const hw)
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{
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int8_t i = get_tc_index(hw);
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device->hw = hw;
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if (!hri_tc_is_syncing(hw, TC_SYNCBUSY_SWRST)) {
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if (hri_tc_get_CTRLA_reg(hw, TC_CTRLA_ENABLE)) {
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hri_tc_clear_CTRLA_ENABLE_bit(hw);
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hri_tc_wait_for_sync(hw, TC_SYNCBUSY_ENABLE);
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}
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hri_tc_write_CTRLA_reg(hw, TC_CTRLA_SWRST);
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}
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hri_tc_wait_for_sync(hw, TC_SYNCBUSY_SWRST);
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hri_tc_write_CTRLA_reg(hw, _tcs[i].ctrl_a);
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hri_tc_write_DBGCTRL_reg(hw, _tcs[i].dbg_ctrl);
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hri_tc_write_EVCTRL_reg(hw, _tcs[i].event_ctrl);
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hri_tc_write_WAVE_reg(hw, TC_WAVE_WAVEGEN_MPWM_Val);
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if ((_tcs[i].ctrl_a & TC_CTRLA_MODE_Msk) == TC_CTRLA_MODE_COUNT32) {
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hri_tccount32_write_CC_reg(hw, 0, _tcs[i].cc0);
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hri_tccount32_write_CC_reg(hw, 1, _tcs[i].cc1);
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} else if ((_tcs[i].ctrl_a & TC_CTRLA_MODE_Msk) == TC_CTRLA_MODE_COUNT16) {
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hri_tccount16_write_CC_reg(hw, 0, (uint16_t)_tcs[i].cc0);
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hri_tccount16_write_CC_reg(hw, 1, (uint16_t)_tcs[i].cc1);
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} else {
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/* 8-bit resolution is not accepted by duty cycle control */
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return -1;
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}
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_tc_init_irq_param(hw, (void *)device);
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NVIC_DisableIRQ(_tcs[i].irq);
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NVIC_ClearPendingIRQ(_tcs[i].irq);
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NVIC_EnableIRQ(_tcs[i].irq);
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return 0;
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}
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/**
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* \brief De-initialize TC for PWM mode
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*/
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void _tc_pwm_deinit(struct _pwm_device *const device)
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{
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void *const hw = device->hw;
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int8_t i = get_tc_index(hw);
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ASSERT(ARRAY_SIZE(_tcs));
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NVIC_DisableIRQ(_tcs[i].irq);
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hri_tc_clear_CTRLA_ENABLE_bit(hw);
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hri_tc_set_CTRLA_SWRST_bit(hw);
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}
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/**
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* \brief Start PWM
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*/
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void _tc_start_pwm(struct _pwm_device *const device)
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{
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hri_tc_set_CTRLA_ENABLE_bit(device->hw);
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}
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/**
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* \brief Stop PWM
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*/
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void _tc_stop_pwm(struct _pwm_device *const device)
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{
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hri_tc_clear_CTRLA_ENABLE_bit(device->hw);
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}
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/**
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* \brief Set PWM parameter
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*/
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void _tc_set_pwm_param(struct _pwm_device *const device, const pwm_period_t period, const pwm_period_t duty_cycle)
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{
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void *const hw = device->hw;
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int8_t i = get_tc_index(hw);
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_tcs[i].cc0 = period;
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_tcs[i].cc1 = duty_cycle;
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if ((_tcs[i].ctrl_a & TC_CTRLA_MODE_Msk) == TC_CTRLA_MODE_COUNT32) {
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hri_tccount32_write_CC_reg(hw, 0, _tcs[i].cc0);
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hri_tccount32_write_CC_reg(hw, 1, _tcs[i].cc1);
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} else {
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hri_tccount16_write_CC_reg(hw, 0, _tcs[i].cc0);
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hri_tccount16_write_CC_reg(hw, 1, _tcs[i].cc1);
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}
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}
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/**
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* \brief Get pwm waveform period value
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*/
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pwm_period_t _tc_pwm_get_period(const struct _pwm_device *const device)
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{
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void *const hw = device->hw;
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int8_t i = get_tc_index(hw);
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if ((_tcs[i].ctrl_a & TC_CTRLA_MODE_Msk) == TC_CTRLA_MODE_COUNT32) {
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return (pwm_period_t)(hri_tccount32_read_CC_reg(hw, 0));
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} else {
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return (pwm_period_t)(hri_tccount16_read_CC_reg(hw, 0));
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}
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}
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/**
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* \brief Get pwm waveform duty cycle
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*/
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uint32_t _tc_pwm_get_duty(const struct _pwm_device *const device)
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{
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void *const hw = device->hw;
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int8_t i = get_tc_index(hw);
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uint32_t per;
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uint32_t duty_cycle;
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if ((_tcs[i].ctrl_a & TC_CTRLA_MODE_Msk) == TC_CTRLA_MODE_COUNT32) {
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per = hri_tccount32_read_CC_reg(hw, 0);
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duty_cycle = hri_tccount32_read_CC_reg(hw, 1);
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} else {
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per = hri_tccount16_read_CC_reg(hw, 0);
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duty_cycle = hri_tccount16_read_CC_reg(hw, 1);
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}
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return ((duty_cycle * 1000) / per);
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}
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/**
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* \brief Check if PWM is running
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*/
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bool _tc_is_pwm_enabled(const struct _pwm_device *const device)
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{
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return hri_tc_get_CTRLA_ENABLE_bit(device->hw);
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}
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/**
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* \brief Enable/disable PWM interrupt
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*/
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void _tc_pwm_set_irq_state(struct _pwm_device *const device, const enum _pwm_callback_type type, const bool disable)
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{
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ASSERT(device);
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if (PWM_DEVICE_PERIOD_CB == type) {
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hri_tc_write_INTEN_OVF_bit(device->hw, disable);
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} else if (PWM_DEVICE_ERROR_CB == type) {
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hri_tc_write_INTEN_ERR_bit(device->hw, disable);
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}
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}
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/**
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* \brief Retrieve timer helper functions
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*/
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struct _timer_hpl_interface *_tc_get_timer(void)
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{
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return NULL;
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}
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/**
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* \brief Retrieve pwm helper functions
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*/
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struct _pwm_hpl_interface *_tc_get_pwm(void)
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{
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return &_tc_pwm_functions;
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}
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/**
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* \internal TC interrupt handler for PWM
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*
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* \param[in] instance TC instance number
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*/
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static void tc_pwm_interrupt_handler(struct _pwm_device *device)
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{
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void *const hw = device->hw;
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if (hri_tc_get_interrupt_OVF_bit(hw)) {
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hri_tc_clear_interrupt_OVF_bit(hw);
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if (NULL != device->callback.pwm_period_cb) {
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device->callback.pwm_period_cb(device);
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}
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}
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if (hri_tc_get_INTEN_ERR_bit(hw)) {
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hri_tc_clear_interrupt_ERR_bit(hw);
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if (NULL != device->callback.pwm_error_cb) {
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device->callback.pwm_error_cb(device);
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}
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}
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}
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/**
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* \brief TC interrupt handler
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*/
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void TC3_Handler(void)
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{
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tc_pwm_interrupt_handler(_tc3_dev);
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}
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/**
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* \internal Retrieve TC index
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*
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* \param[in] hw The pointer to hardware instance
|
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*
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* \return The index of TC configuration
|
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*/
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static int8_t get_tc_index(const void *const hw)
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{
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uint8_t index = _get_hardware_offset(hw);
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uint8_t i;
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for (i = 0; i < ARRAY_SIZE(_tcs); i++) {
|
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if (_tcs[i].number == index) {
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return i;
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}
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}
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ASSERT(false);
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return -1;
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}
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/**
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* \brief Init irq param with the given tc hardware instance
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*/
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static void _tc_init_irq_param(const void *const hw, void *dev)
|
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{
|
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if (hw == TC3) {
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_tc3_dev = (struct _pwm_device *)dev;
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}
|
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}
|
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|
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/**
|
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* \internal Retrieve TC hardware index
|
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*
|
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* \param[in] hw The pointer to hardware instance
|
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*/
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static inline uint8_t _get_hardware_offset(const void *const hw)
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{
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return (((uint32_t)hw - (uint32_t)TC0) >> 10);
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}
|
||||
@@ -1,160 +0,0 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Timer/Counter
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*/
|
||||
|
||||
#ifndef _HPL_TC_BASE_H_INCLUDED
|
||||
#define _HPL_TC_BASE_H_INCLUDED
|
||||
|
||||
#include <hpl_timer.h>
|
||||
#include <hpl_pwm.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup tc_group TC Hardware Proxy Layer
|
||||
*
|
||||
* \section tc_hpl_rev Revision History
|
||||
* - v0.0.0.1 Initial Commit
|
||||
*
|
||||
*@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name HPL functions
|
||||
*/
|
||||
//@{
|
||||
|
||||
/**
|
||||
* \brief Retrieve timer helper functions
|
||||
*
|
||||
* \return A pointer to set of timer helper functions
|
||||
*/
|
||||
struct _timer_hpl_interface *_tc_get_timer(void);
|
||||
/**
|
||||
* \brief Initialize TC for PWM
|
||||
*
|
||||
* This function does low level TC configuration.
|
||||
*
|
||||
* \param[in] device The pointer to TC device instance
|
||||
* \param[in] hw The pointer to hardware instance
|
||||
*
|
||||
* \return Initialization status.
|
||||
*/
|
||||
int32_t _tc_pwm_init(struct _pwm_device *const device, void *const hw);
|
||||
|
||||
/**
|
||||
* \brief De-initialize TC for PWM
|
||||
*
|
||||
* \param[in] device The pointer to TC device instance
|
||||
*/
|
||||
void _tc_pwm_deinit(struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Retrieve offset of the given tc hardware instance
|
||||
*
|
||||
* \param[in] device The pointer to TC device instance
|
||||
*
|
||||
* \return The offset of the given tc hardware instance
|
||||
*/
|
||||
uint8_t _tc_pwm_get_hardware_offset(const struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Start PWM
|
||||
*
|
||||
* \param[in] device The pointer to TC device instance
|
||||
*/
|
||||
void _tc_start_pwm(struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Stop PWM
|
||||
*
|
||||
* \param[in] device The pointer to TC device instance
|
||||
*/
|
||||
void _tc_stop_pwm(struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Check if PWM is running
|
||||
*
|
||||
* \param[in] device The pointer to TC device instance
|
||||
*
|
||||
* \return Check status.
|
||||
* \retval true The given timer is running
|
||||
* \retval false The given timer is not running
|
||||
*/
|
||||
bool _tc_is_pwm_enabled(const struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Set PWM parameter
|
||||
* \param[in] device The pointer to TC device instance
|
||||
* \param[in] period Total period of one PWM cycle.
|
||||
* \param[in] duty_cycle Period of PWM first half during one cycle.
|
||||
*/
|
||||
void _tc_set_pwm_param(struct _pwm_device *const device, const pwm_period_t period, const pwm_period_t duty_cycle);
|
||||
|
||||
/**
|
||||
* \brief Get pwm waveform period value
|
||||
* \param[in] device The pointer to TC device instance
|
||||
* \return Period value.
|
||||
*/
|
||||
pwm_period_t _tc_pwm_get_period(const struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Get pwm waveform duty cycle value
|
||||
* \param[in] device The pointer to TC device instance
|
||||
* \return Duty cycle value
|
||||
*/
|
||||
uint32_t _tc_pwm_get_duty(const struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Enable/disable PWM interrupt
|
||||
*
|
||||
* param[in] device The pointer to PWM device instance
|
||||
* param[in] type The type of interrupt to disable/enable if applicable
|
||||
* param[in] disable Enable or disable
|
||||
*/
|
||||
void _tc_pwm_set_irq_state(struct _pwm_device *const device, const enum _pwm_callback_type type, const bool disable);
|
||||
|
||||
/**
|
||||
* \brief Retrieve pwm helper functions
|
||||
*
|
||||
* \return A pointer to set of pwm helper functions
|
||||
*/
|
||||
struct _pwm_hpl_interface *_tc_get_pwm(void);
|
||||
|
||||
//@}
|
||||
/**@}*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* _HPL_TC_BASE_H_INCLUDED */
|
||||
101
Smol Watch Project/My Project/hpl/tc/tc_lite.c
Normal file
101
Smol Watch Project/My Project/hpl/tc/tc_lite.c
Normal file
@@ -0,0 +1,101 @@
|
||||
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief TC related functionality implementation.
|
||||
*
|
||||
* Copyright (c) 2017 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include "tc_lite.h"
|
||||
|
||||
/**
|
||||
* \brief Initialize TC interface
|
||||
*/
|
||||
int8_t PWM_0_init()
|
||||
{
|
||||
|
||||
if (!hri_tc_is_syncing(TC3, TC_SYNCBUSY_SWRST)) {
|
||||
if (hri_tc_get_CTRLA_reg(TC3, TC_CTRLA_ENABLE)) {
|
||||
hri_tc_clear_CTRLA_ENABLE_bit(TC3);
|
||||
hri_tc_wait_for_sync(TC3, TC_SYNCBUSY_ENABLE);
|
||||
}
|
||||
hri_tc_write_CTRLA_reg(TC3, TC_CTRLA_SWRST);
|
||||
}
|
||||
hri_tc_wait_for_sync(TC3, TC_SYNCBUSY_SWRST);
|
||||
|
||||
hri_tc_write_CTRLA_reg(TC3,
|
||||
0 << TC_CTRLA_COPEN0_Pos /* Capture Pin 0 Enable: disabled */
|
||||
| 0 << TC_CTRLA_COPEN1_Pos /* Capture Pin 1 Enable: disabled */
|
||||
| 0 << TC_CTRLA_CAPTEN0_Pos /* Capture Channel 0 Enable: disabled */
|
||||
| 0 << TC_CTRLA_CAPTEN1_Pos /* Capture Channel 1 Enable: disabled */
|
||||
| 0 << TC_CTRLA_ALOCK_Pos /* Auto Lock: disabled */
|
||||
| 0 << TC_CTRLA_PRESCSYNC_Pos /* Prescaler and Counter Synchronization: 0 */
|
||||
| 0 << TC_CTRLA_ONDEMAND_Pos /* Clock On Demand: disabled */
|
||||
| 0 << TC_CTRLA_RUNSTDBY_Pos /* Run in Standby: disabled */
|
||||
| 0 << TC_CTRLA_PRESCALER_Pos /* Setting: 0 */
|
||||
| 0x1 << TC_CTRLA_MODE_Pos); /* Operating Mode: 0x1 */
|
||||
|
||||
hri_tc_write_CTRLB_reg(TC3,
|
||||
0 << TC_CTRLBSET_CMD_Pos /* Command: 0 */
|
||||
| 0 << TC_CTRLBSET_ONESHOT_Pos /* One-Shot: disabled */
|
||||
| 0 << TC_CTRLBCLR_LUPD_Pos /* Setting: disabled */
|
||||
| 0 << TC_CTRLBSET_DIR_Pos); /* Counter Direction: disabled */
|
||||
|
||||
// hri_tc_write_WAVE_reg(TC3,0); /* Waveform Generation Mode: 0 */
|
||||
|
||||
// hri_tc_write_DRVCTRL_reg(TC3,0 << TC_DRVCTRL_INVEN1_Pos /* Output Waveform 1 Invert Enable: disabled */
|
||||
// | 0 << TC_DRVCTRL_INVEN0_Pos); /* Output Waveform 0 Invert Enable: disabled */
|
||||
|
||||
// hri_tc_write_DBGCTRL_reg(TC3,0); /* Run in debug: 0 */
|
||||
|
||||
// hri_tccount8_write_CC_reg(TC3, 0 ,0x0); /* Compare/Capture Value: 0x0 */
|
||||
|
||||
// hri_tccount8_write_CC_reg(TC3, 1 ,0x0); /* Compare/Capture Value: 0x0 */
|
||||
|
||||
// hri_tccount8_write_COUNT_reg(TC3,0x0); /* Counter Value: 0x0 */
|
||||
|
||||
// hri_tc_write_PER_reg(TC3,0x0); /* Period Value: 0x0 */
|
||||
|
||||
// hri_tc_write_EVCTRL_reg(TC3,0 << TC_EVCTRL_MCEO0_Pos /* Match or Capture Channel 0 Event Output Enable: disabled
|
||||
// */
|
||||
// | 0 << TC_EVCTRL_MCEO1_Pos /* Match or Capture Channel 1 Event Output Enable: disabled */
|
||||
// | 0 << TC_EVCTRL_OVFEO_Pos /* Overflow/Underflow Event Output Enable: disabled */
|
||||
// | 0 << TC_EVCTRL_TCEI_Pos /* TC Event Input: disabled */
|
||||
// | 0 << TC_EVCTRL_TCINV_Pos /* TC Inverted Event Input: disabled */
|
||||
// | 0); /* Event Action: 0 */
|
||||
|
||||
// hri_tc_write_INTEN_reg(TC3,0 << TC_INTENSET_MC0_Pos /* Match or Capture Channel 0 Interrupt Enable: disabled */
|
||||
// | 0 << TC_INTENSET_MC1_Pos /* Match or Capture Channel 1 Interrupt Enable: disabled */
|
||||
// | 0 << TC_INTENSET_ERR_Pos /* Error Interrupt Enable: disabled */
|
||||
// | 0 << TC_INTENSET_OVF_Pos); /* Overflow Interrupt enable: disabled */
|
||||
|
||||
hri_tc_write_CTRLA_ENABLE_bit(TC3, 1 << TC_CTRLA_ENABLE_Pos); /* Enable: enabled */
|
||||
|
||||
return 0;
|
||||
}
|
||||
64
Smol Watch Project/My Project/hpl/tc/tc_lite.h
Normal file
64
Smol Watch Project/My Project/hpl/tc/tc_lite.h
Normal file
@@ -0,0 +1,64 @@
|
||||
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief TC related functionality declaration.
|
||||
*
|
||||
* Copyright (c) 2017 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _TC_H_INCLUDED
|
||||
#define _TC_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <utils_assert.h>
|
||||
|
||||
/**
|
||||
* \addtogroup tc driver
|
||||
*
|
||||
* \section tc Revision History
|
||||
* - v0.0.0.1 Initial Commit
|
||||
*
|
||||
*@{
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Initialize tc interface
|
||||
* \return Initialization status.
|
||||
*/
|
||||
int8_t PWM_0_init();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _TC_H_INCLUDED */
|
||||
@@ -123,21 +123,6 @@ static struct tcc_pwm_cfg _cfgs_pwm[1] = {
|
||||
|
||||
static struct _pwm_device *_tcc0_dev = NULL;
|
||||
|
||||
/**
|
||||
* \brief Set of pointer to hal_pwm helper functions
|
||||
*/
|
||||
static struct _pwm_hpl_interface _tcc_pwm_functions = {
|
||||
_tcc_pwm_init,
|
||||
_tcc_pwm_deinit,
|
||||
_tcc_start_pwm,
|
||||
_tcc_stop_pwm,
|
||||
_tcc_set_pwm_param,
|
||||
_tcc_is_pwm_enabled,
|
||||
_tcc_pwm_get_period,
|
||||
_tcc_pwm_get_duty,
|
||||
_tcc_pwm_set_irq_state,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Init irq param with the given tcc hardware instance
|
||||
*/
|
||||
@@ -150,7 +135,7 @@ static void _tcc_init_irq_param(const void *const hw, void *dev)
|
||||
/**
|
||||
* \brief Initialize TCC for PWM mode
|
||||
*/
|
||||
int32_t _tcc_pwm_init(struct _pwm_device *const device, void *const hw)
|
||||
int32_t _pwm_init(struct _pwm_device *const device, void *const hw)
|
||||
{
|
||||
struct tcc_cfg *cfg = _get_tcc_cfg(hw);
|
||||
if (cfg == NULL) {
|
||||
@@ -213,7 +198,7 @@ int32_t _tcc_pwm_init(struct _pwm_device *const device, void *const hw)
|
||||
/**
|
||||
* \brief De-initialize TCC for PWM mode
|
||||
*/
|
||||
void _tcc_pwm_deinit(struct _pwm_device *const device)
|
||||
void _pwm_deinit(struct _pwm_device *const device)
|
||||
{
|
||||
void *const hw = device->hw;
|
||||
struct tcc_pwm_cfg *cfg_pwm = _get_tcc_pwm_cfg(hw);
|
||||
@@ -226,21 +211,21 @@ void _tcc_pwm_deinit(struct _pwm_device *const device)
|
||||
/**
|
||||
* \brief Start PWM
|
||||
*/
|
||||
void _tcc_start_pwm(struct _pwm_device *const device)
|
||||
void _pwm_enable(struct _pwm_device *const device)
|
||||
{
|
||||
hri_tcc_set_CTRLA_ENABLE_bit(device->hw);
|
||||
}
|
||||
/**
|
||||
* \brief Stop PWM
|
||||
*/
|
||||
void _tcc_stop_pwm(struct _pwm_device *const device)
|
||||
void _pwm_disable(struct _pwm_device *const device)
|
||||
{
|
||||
hri_tcc_clear_CTRLA_ENABLE_bit(device->hw);
|
||||
}
|
||||
/**
|
||||
* \brief Set PWM parameter
|
||||
*/
|
||||
void _tcc_set_pwm_param(struct _pwm_device *const device, const pwm_period_t period, const pwm_period_t duty_cycle)
|
||||
void _pwm_set_param(struct _pwm_device *const device, const pwm_period_t period, const pwm_period_t duty_cycle)
|
||||
{
|
||||
void *const hw = device->hw;
|
||||
struct tcc_pwm_cfg *cfg_pwm = _get_tcc_pwm_cfg(hw);
|
||||
@@ -253,14 +238,14 @@ void _tcc_set_pwm_param(struct _pwm_device *const device, const pwm_period_t per
|
||||
/**
|
||||
* \brief Get pwm waveform period value
|
||||
*/
|
||||
pwm_period_t _tcc_pwm_get_period(const struct _pwm_device *const device)
|
||||
pwm_period_t _pwm_get_period(const struct _pwm_device *const device)
|
||||
{
|
||||
return (pwm_period_t)(hri_tcc_read_PERB_reg(device->hw));
|
||||
}
|
||||
/**
|
||||
* \brief Get pwm waveform duty cycle
|
||||
*/
|
||||
uint32_t _tcc_pwm_get_duty(const struct _pwm_device *const device)
|
||||
uint32_t _pwm_get_duty(const struct _pwm_device *const device)
|
||||
{
|
||||
void *const hw = device->hw;
|
||||
struct tcc_pwm_cfg *cfg_pwm = _get_tcc_pwm_cfg(hw);
|
||||
@@ -275,14 +260,14 @@ uint32_t _tcc_pwm_get_duty(const struct _pwm_device *const device)
|
||||
/**
|
||||
* \brief Check if PWM is running
|
||||
*/
|
||||
bool _tcc_is_pwm_enabled(const struct _pwm_device *const device)
|
||||
bool _pwm_is_enabled(const struct _pwm_device *const device)
|
||||
{
|
||||
return hri_tcc_get_CTRLA_ENABLE_bit(device->hw);
|
||||
}
|
||||
/**
|
||||
* \brief Enable/disable PWM interrupt
|
||||
*/
|
||||
void _tcc_pwm_set_irq_state(struct _pwm_device *const device, const enum _pwm_callback_type type, const bool disable)
|
||||
void _pwm_set_irq_state(struct _pwm_device *const device, const enum _pwm_callback_type type, const bool disable)
|
||||
{
|
||||
ASSERT(device);
|
||||
|
||||
@@ -306,7 +291,7 @@ struct _timer_hpl_interface *_tcc_get_timer(void)
|
||||
*/
|
||||
struct _pwm_hpl_interface *_tcc_get_pwm(void)
|
||||
{
|
||||
return &_tcc_pwm_functions;
|
||||
return NULL;
|
||||
}
|
||||
/**
|
||||
* \internal TC interrupt handler for PWM
|
||||
|
||||
@@ -60,89 +60,6 @@ extern "C" {
|
||||
* \return A pointer to set of timer helper functions
|
||||
*/
|
||||
struct _timer_hpl_interface *_tcc_get_timer(void);
|
||||
/**
|
||||
* \brief Initialize TCC for PWM
|
||||
*
|
||||
* This function does low level TCC configuration.
|
||||
*
|
||||
* \param[in] device The pointer to PWM device instance
|
||||
* \param[in] hw The pointer to hardware instance
|
||||
*
|
||||
* \return Initialization status.
|
||||
*/
|
||||
int32_t _tcc_pwm_init(struct _pwm_device *const device, void *const hw);
|
||||
|
||||
/**
|
||||
* \brief De-initialize TCC for PWM
|
||||
*
|
||||
* \param[in] device The pointer to TCC device instance
|
||||
*/
|
||||
void _tcc_pwm_deinit(struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Retrieve offset of the given tcc hardware instance
|
||||
*
|
||||
* \param[in] device The pointer to TCC device instance
|
||||
*
|
||||
* \return The offset of the given tcc hardware instance
|
||||
*/
|
||||
uint8_t _tcc_pwm_get_hardware_offset(const struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Start PWM
|
||||
*
|
||||
* \param[in] device The pointer to TCC device instance
|
||||
*/
|
||||
void _tcc_start_pwm(struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Stop PWM
|
||||
*
|
||||
* \param[in] device The pointer to TCC device instance
|
||||
*/
|
||||
void _tcc_stop_pwm(struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Check if PWM is running
|
||||
*
|
||||
* \param[in] device The pointer to TCC device instance
|
||||
*
|
||||
* \return Check status.
|
||||
* \retval true The given pwm is running
|
||||
* \retval false The given pwm is not running
|
||||
*/
|
||||
bool _tcc_is_pwm_enabled(const struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Set PWM parameter
|
||||
* \param[in] device The pointer to TCC device instance
|
||||
* \param[in] period Total period of one PWM cycle.
|
||||
* \param[in] duty_cycle Period of PWM first half during one cycle.
|
||||
*/
|
||||
void _tcc_set_pwm_param(struct _pwm_device *const device, const pwm_period_t period, const pwm_period_t duty_cycle);
|
||||
|
||||
/**
|
||||
* \brief Get pwm waveform period value
|
||||
* \param[in] device The pointer to TCC device instance
|
||||
* \return Period value.
|
||||
*/
|
||||
pwm_period_t _tcc_pwm_get_period(const struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Get pwm waveform duty cycle value
|
||||
* \param[in] device The pointer to TCC device instance
|
||||
* \return Duty cycle value
|
||||
*/
|
||||
uint32_t _tcc_pwm_get_duty(const struct _pwm_device *const device);
|
||||
|
||||
/**
|
||||
* \brief Enable/disable PWM interrupt
|
||||
*
|
||||
* param[in] device The pointer to PWM device instance
|
||||
* param[in] type The type of interrupt to disable/enable if applicable
|
||||
* param[in] disable Enable or disable
|
||||
*/
|
||||
void _tcc_pwm_set_irq_state(struct _pwm_device *const device, const enum _pwm_callback_type type, const bool disable);
|
||||
|
||||
/**
|
||||
* \brief Retrieve pwm helper functions
|
||||
|
||||
Reference in New Issue
Block a user