b8de35658f
* Put something on screen * Use the 32bit watch_date_time repr to pass from JS * Implement periodic callbacks * Clear display on enabling * Hook up watch_set_led_color() to SVG (green-only) * Make debug output full-width * Remove default Emscripten canvas * Implement sleep and button clicks * Fix time zone conversion bug in beats-time app * Clean up warnings * Fix pin levels * Set time zone to browser value (if available) * Add basic backup data saving * Silence format specifier warnings in both targets * Remove unnecessary, copied files * Use RTC pointer to clear callbacks (if available) * Use preprocessor define to avoid hardcoding MOVEMENT_NUM_FACES * Change each face to const preprocessor definition * Remove Intl.DateTimeFormat usage * Update shell.html title, header * Add touch start/end event handlers on SVG buttons * Update shell.html * Update folder structure (shared, simulator, hardware under watch-library) * Tease out shared components from watch_slcd * Clean up simulator watch_slcd.c inline JS calls * Fix missing newlines at end of file * Add simulator warnings (except format, unused-paremter) * Implement remaining watch_rtc functions * Fix button bug on mouse down then drag out * Implement remaining watch_slcd functions * Link keyboard events to buttons (for keys A, L, M) * Rewrite event handling (mouse, touch, keyboard) in C * Set explicit text UTF-8 charset in shell.html * Address PR comments * Remove unused directories from include paths
90 lines
5.8 KiB
C
90 lines
5.8 KiB
C
/**
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* \file
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*
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* \brief Instance description for MTB
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*
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* Copyright (c) 2018 Microchip Technology Inc.
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*
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* \asf_license_start
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*
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* \page License
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the Licence at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \asf_license_stop
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*
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*/
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#ifndef _SAML22_MTB_INSTANCE_
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#define _SAML22_MTB_INSTANCE_
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/* ========== Register definition for MTB peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_MTB_POSITION (0x4100A000) /**< \brief (MTB) MTB Position */
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#define REG_MTB_MASTER (0x4100A004) /**< \brief (MTB) MTB Master */
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#define REG_MTB_FLOW (0x4100A008) /**< \brief (MTB) MTB Flow */
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#define REG_MTB_BASE (0x4100A00C) /**< \brief (MTB) MTB Base */
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#define REG_MTB_ITCTRL (0x4100AF00) /**< \brief (MTB) MTB Integration Mode Control */
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#define REG_MTB_CLAIMSET (0x4100AFA0) /**< \brief (MTB) MTB Claim Set */
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#define REG_MTB_CLAIMCLR (0x4100AFA4) /**< \brief (MTB) MTB Claim Clear */
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#define REG_MTB_LOCKACCESS (0x4100AFB0) /**< \brief (MTB) MTB Lock Access */
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#define REG_MTB_LOCKSTATUS (0x4100AFB4) /**< \brief (MTB) MTB Lock Status */
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#define REG_MTB_AUTHSTATUS (0x4100AFB8) /**< \brief (MTB) MTB Authentication Status */
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#define REG_MTB_DEVARCH (0x4100AFBC) /**< \brief (MTB) MTB Device Architecture */
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#define REG_MTB_DEVID (0x4100AFC8) /**< \brief (MTB) MTB Device Configuration */
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#define REG_MTB_DEVTYPE (0x4100AFCC) /**< \brief (MTB) MTB Device Type */
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#define REG_MTB_PID4 (0x4100AFD0) /**< \brief (MTB) Peripheral Identification 4 */
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#define REG_MTB_PID5 (0x4100AFD4) /**< \brief (MTB) Peripheral Identification 5 */
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#define REG_MTB_PID6 (0x4100AFD8) /**< \brief (MTB) Peripheral Identification 6 */
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#define REG_MTB_PID7 (0x4100AFDC) /**< \brief (MTB) Peripheral Identification 7 */
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#define REG_MTB_PID0 (0x4100AFE0) /**< \brief (MTB) Peripheral Identification 0 */
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#define REG_MTB_PID1 (0x4100AFE4) /**< \brief (MTB) Peripheral Identification 1 */
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#define REG_MTB_PID2 (0x4100AFE8) /**< \brief (MTB) Peripheral Identification 2 */
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#define REG_MTB_PID3 (0x4100AFEC) /**< \brief (MTB) Peripheral Identification 3 */
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#define REG_MTB_CID0 (0x4100AFF0) /**< \brief (MTB) Component Identification 0 */
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#define REG_MTB_CID1 (0x4100AFF4) /**< \brief (MTB) Component Identification 1 */
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#define REG_MTB_CID2 (0x4100AFF8) /**< \brief (MTB) Component Identification 2 */
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#define REG_MTB_CID3 (0x4100AFFC) /**< \brief (MTB) Component Identification 3 */
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#else
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#define REG_MTB_POSITION (*(RwReg *)0x4100A000UL) /**< \brief (MTB) MTB Position */
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#define REG_MTB_MASTER (*(RwReg *)0x4100A004UL) /**< \brief (MTB) MTB Master */
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#define REG_MTB_FLOW (*(RwReg *)0x4100A008UL) /**< \brief (MTB) MTB Flow */
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#define REG_MTB_BASE (*(RoReg *)0x4100A00CUL) /**< \brief (MTB) MTB Base */
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#define REG_MTB_ITCTRL (*(RwReg *)0x4100AF00UL) /**< \brief (MTB) MTB Integration Mode Control */
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#define REG_MTB_CLAIMSET (*(RwReg *)0x4100AFA0UL) /**< \brief (MTB) MTB Claim Set */
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#define REG_MTB_CLAIMCLR (*(RwReg *)0x4100AFA4UL) /**< \brief (MTB) MTB Claim Clear */
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#define REG_MTB_LOCKACCESS (*(RwReg *)0x4100AFB0UL) /**< \brief (MTB) MTB Lock Access */
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#define REG_MTB_LOCKSTATUS (*(RoReg *)0x4100AFB4UL) /**< \brief (MTB) MTB Lock Status */
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#define REG_MTB_AUTHSTATUS (*(RoReg *)0x4100AFB8UL) /**< \brief (MTB) MTB Authentication Status */
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#define REG_MTB_DEVARCH (*(RoReg *)0x4100AFBCUL) /**< \brief (MTB) MTB Device Architecture */
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#define REG_MTB_DEVID (*(RoReg *)0x4100AFC8UL) /**< \brief (MTB) MTB Device Configuration */
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#define REG_MTB_DEVTYPE (*(RoReg *)0x4100AFCCUL) /**< \brief (MTB) MTB Device Type */
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#define REG_MTB_PID4 (*(RoReg *)0x4100AFD0UL) /**< \brief (MTB) Peripheral Identification 4 */
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#define REG_MTB_PID5 (*(RoReg *)0x4100AFD4UL) /**< \brief (MTB) Peripheral Identification 5 */
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#define REG_MTB_PID6 (*(RoReg *)0x4100AFD8UL) /**< \brief (MTB) Peripheral Identification 6 */
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#define REG_MTB_PID7 (*(RoReg *)0x4100AFDCUL) /**< \brief (MTB) Peripheral Identification 7 */
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#define REG_MTB_PID0 (*(RoReg *)0x4100AFE0UL) /**< \brief (MTB) Peripheral Identification 0 */
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#define REG_MTB_PID1 (*(RoReg *)0x4100AFE4UL) /**< \brief (MTB) Peripheral Identification 1 */
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#define REG_MTB_PID2 (*(RoReg *)0x4100AFE8UL) /**< \brief (MTB) Peripheral Identification 2 */
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#define REG_MTB_PID3 (*(RoReg *)0x4100AFECUL) /**< \brief (MTB) Peripheral Identification 3 */
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#define REG_MTB_CID0 (*(RoReg *)0x4100AFF0UL) /**< \brief (MTB) Component Identification 0 */
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#define REG_MTB_CID1 (*(RoReg *)0x4100AFF4UL) /**< \brief (MTB) Component Identification 1 */
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#define REG_MTB_CID2 (*(RoReg *)0x4100AFF8UL) /**< \brief (MTB) Component Identification 2 */
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#define REG_MTB_CID3 (*(RoReg *)0x4100AFFCUL) /**< \brief (MTB) Component Identification 3 */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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#endif /* _SAML22_MTB_INSTANCE_ */
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