118 lines
4.4 KiB
C
118 lines
4.4 KiB
C
/*
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* MIT License
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*
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* Copyright (c) 2020 Joey Castillo
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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void watch_enable_external_interrupts() {
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// Configure EIC to use GCLK3 (the 32.768 kHz crystal)
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hri_gclk_write_PCHCTRL_reg(GCLK, EIC_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos));
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// Enable AHB clock for the EIC
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hri_mclk_set_APBAMASK_EIC_bit(MCLK);
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// call HAL's external interrupt init function
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ext_irq_init();
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}
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void watch_disable_external_interrupts() {
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ext_irq_deinit();
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hri_mclk_clear_APBAMASK_EIC_bit(MCLK);
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}
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void watch_register_interrupt_callback(const uint8_t pin, ext_irq_cb_t callback, watch_interrupt_trigger trigger) {
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uint32_t pinmux;
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hri_eic_config_reg_t config = hri_eic_get_CONFIG_reg(EIC, 0, 0xFFFFFFFF);
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switch (pin) {
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case A4:
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// same steps for each: determine the correct pin mux...
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pinmux = PINMUX_PB00A_EIC_EXTINT0;
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// ...clear out the configuration for this EIC channel...
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config &= ~EIC_CONFIG_SENSE0_Msk;
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// ...and reconfigure it with our new trigger value.
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config |= EIC_CONFIG_SENSE0(trigger);
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break;
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case A1:
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pinmux = PINMUX_PB01A_EIC_EXTINT1;
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config &= ~EIC_CONFIG_SENSE1_Msk;
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config |= EIC_CONFIG_SENSE1(trigger);
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break;
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case BTN_ALARM:
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gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN);
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pinmux = PINMUX_PA02A_EIC_EXTINT2;
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config &= ~EIC_CONFIG_SENSE2_Msk;
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config |= EIC_CONFIG_SENSE2(trigger);
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break;
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case A2:
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pinmux = PINMUX_PB02A_EIC_EXTINT2;
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config &= ~EIC_CONFIG_SENSE2_Msk;
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config |= EIC_CONFIG_SENSE2(trigger);
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break;
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case A3:
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pinmux = PINMUX_PB03A_EIC_EXTINT3;
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config &= ~EIC_CONFIG_SENSE3_Msk;
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config |= EIC_CONFIG_SENSE3(trigger);
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break;
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case A0:
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pinmux = PINMUX_PB04A_EIC_EXTINT4;
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config &= ~EIC_CONFIG_SENSE4_Msk;
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config |= EIC_CONFIG_SENSE4(trigger);
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break;
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case BTN_LIGHT:
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gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN);
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pinmux = PINMUX_PA22A_EIC_EXTINT6;
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config &= ~EIC_CONFIG_SENSE6_Msk;
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config |= EIC_CONFIG_SENSE6(trigger);
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break;
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case BTN_MODE:
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gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN);
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pinmux = PINMUX_PA23A_EIC_EXTINT7;
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config &= ~EIC_CONFIG_SENSE7_Msk;
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config |= EIC_CONFIG_SENSE7(trigger);
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break;
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default:
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return;
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}
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gpio_set_pin_direction(pin, GPIO_DIRECTION_IN);
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gpio_set_pin_function(pin, pinmux);
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// EIC configuration register is enable-protected, so we have to disable it first...
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if (hri_eic_get_CTRLA_reg(EIC, EIC_CTRLA_ENABLE)) {
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hri_eic_clear_CTRLA_ENABLE_bit(EIC);
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// ...and wait for it to synchronize.
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hri_eic_wait_for_sync(EIC, EIC_SYNCBUSY_ENABLE);
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}
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// now update the configuration...
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hri_eic_write_CONFIG_reg(EIC, 0, config);
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// ...and re-enable the EIC
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hri_eic_set_CTRLA_ENABLE_bit(EIC);
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ext_irq_register(pin, callback);
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}
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inline void watch_register_button_callback(const uint8_t pin, ext_irq_cb_t callback) {
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watch_register_interrupt_callback(pin, callback, INTERRUPT_TRIGGER_RISING);
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}
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inline void watch_enable_buttons() {
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watch_enable_external_interrupts();
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}
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