Initial commit
This commit is contained in:
Puck Meerburg
232
src/usb/core.c
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232
src/usb/core.c
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#include <stdlib.h>
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#include "core.h"
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#include "CH58x_common.h"
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static volatile uint8_t *ep_t_len_regs[] = {
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&R8_UEP0_T_LEN,
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&R8_UEP1_T_LEN,
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&R8_UEP2_T_LEN,
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&R8_UEP3_T_LEN,
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&R8_UEP4_T_LEN,
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&R8_UEP5_T_LEN,
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&R8_UEP6_T_LEN,
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&R8_UEP7_T_LEN,
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};
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static volatile uint8_t *ep_ctrl_regs[] = {
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&R8_UEP0_CTRL,
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&R8_UEP1_CTRL,
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&R8_UEP2_CTRL,
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&R8_UEP3_CTRL,
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&R8_UEP4_CTRL,
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&R8_UEP5_CTRL,
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&R8_UEP6_CTRL,
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&R8_UEP7_CTRL,
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};
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static uint8_t recvlens[8];
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uint8_t bConfigurationValue = 0;
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// The hardware requires EP0 and EP4 to share a contiguous DMA buffer.
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// Fuck if I know why.
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__attribute__((aligned(4))) volatile uint8_t ep04_buf[64 + 64 + 64];
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__attribute__((aligned(4))) volatile uint8_t epbuf[(8 - 2) * 2 * 64];
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volatile uint8_t *buf_for_ep(uint8_t ep, int dir_in) {
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if (ep == 0) return ep04_buf;
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if (ep == 4) return ep04_buf + (dir_in ? 128 : 64);
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// EP0 and EP4 aren't in here. so skip them.
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ep -= 1;
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if (ep > 3) ep -= 1;
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return epbuf + (ep * 128 + (dir_in ? 64 : 0));
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}
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// Configure the response to set for the next token for the endpoint.
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// The interrupt handler will reconfigure this to return NAK whenever
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// the next token has been received.
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enum usb_endpoint_state set_endpoint_state(uint8_t endpoint, enum usb_endpoint_state state) {
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int dir_in = endpoint & 0x80; // 0 -> OUT endpoint, 1 -> IN endpoint
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int ep_num = endpoint & 0x7F;
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if (dir_in) {
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uint8_t prev_state = *ep_ctrl_regs[ep_num] & MASK_UEP_T_RES;
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*ep_ctrl_regs[ep_num] = (*ep_ctrl_regs[ep_num] & ~MASK_UEP_T_RES) | (state & 0x03);
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return prev_state;
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} else {
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uint8_t prev_state = (*ep_ctrl_regs[ep_num] & MASK_UEP_R_RES) >> 2;
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*ep_ctrl_regs[ep_num] = (*ep_ctrl_regs[ep_num] & ~MASK_UEP_R_RES) | ((state & 0x03) << 2);
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return prev_state;
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}
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}
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// Toggle the DATA0/DATA1 toggle bit, indicating which of
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// DATA0 and DATA1 to use fo rthe next receiving or sending of data.
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// These bits are only toggled once data has been successfully transferred;
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// a la USB_EP_STATE_ACK.
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//
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// The SETUP control transfers on endoint 0 _always_ use DATA0.
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static void flip_endpoint_data_toggle(uint8_t endpoint) {
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int dir_in = endpoint & 0x80;
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int ep_num = endpoint & 0x7F;
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if (dir_in) {
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*ep_ctrl_regs[ep_num] ^= RB_UEP_T_TOG;
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} else {
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*ep_ctrl_regs[ep_num] ^= RB_UEP_R_TOG;
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}
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}
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static void handle_bus_reset() {
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R8_USB_INT_FG = RB_UIF_BUS_RST;
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R8_USB_DEV_AD = 0;
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bConfigurationValue = 0;
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}
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static void handle_suspend() {
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R8_USB_INT_FG = RB_UIF_SUSPEND;
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// TODO
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}
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static void handle_sof() {
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R8_USB_INT_FG = RB_UIF_HST_SOF;
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}
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__HIGH_CODE
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static void handle_transfer(uint8_t ep_num, int is_in) {
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uint8_t endpoint = ep_num | (is_in ? 0x80 : 0);
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// We may have received a transfer.
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// If we expected this transfer, toggle the DATA0/DATA1 bits.
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enum usb_endpoint_state prev_state = set_endpoint_state(endpoint, USB_EP_STATE_NAK);
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if (prev_state == USB_EP_STATE_ACK) {
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flip_endpoint_data_toggle(endpoint);
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}
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if (ep_num == 0) {
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handle_ctrl_transfer(is_in);
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return;
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}
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if (!is_in) {
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recvlens[endpoint] = R8_USB_RX_LEN;
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}
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}
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void usb_init() {
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R8_USB_CTRL = 0x00;
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R8_UEP4_1_MOD = RB_UEP4_RX_EN | RB_UEP4_TX_EN |
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RB_UEP1_RX_EN | RB_UEP1_TX_EN;
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R8_UEP2_3_MOD = RB_UEP2_RX_EN | RB_UEP2_TX_EN |
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RB_UEP3_RX_EN | RB_UEP3_TX_EN;
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R8_UEP567_MOD = RB_UEP7_RX_EN | RB_UEP7_TX_EN |
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RB_UEP6_RX_EN | RB_UEP6_TX_EN |
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RB_UEP5_RX_EN | RB_UEP5_TX_EN;
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R16_PIN_ANALOG_IE |= RB_PIN_USB_IE | RB_PIN_USB_DP_PU;
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R8_UDEV_CTRL = RB_UD_PD_DIS | RB_UD_PORT_EN;
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R8_USB_DEV_AD = 0x00;
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R8_USB_INT_FG = 0xFF;
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R16_UEP0_DMA = ep04_buf;
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R16_UEP1_DMA = epbuf + 0 * 128;
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R16_UEP2_DMA = epbuf + 1 * 128;
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R16_UEP3_DMA = epbuf + 2 * 128;
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R16_UEP5_DMA = epbuf + 3 * 128;
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R16_UEP6_DMA = epbuf + 4 * 128;
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R16_UEP7_DMA = epbuf + 5 * 128;
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for (int i = 0; i < 8; i++) {
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set_endpoint_state(i, USB_EP_STATE_NAK);
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set_endpoint_state(i | 0x80, USB_EP_STATE_NAK);
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}
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R8_USB_CTRL = RB_UC_DEV_PU_EN | RB_UC_INT_BUSY | RB_UC_DMA_EN;
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R8_USB_INT_EN = RB_UIE_SUSPEND | RB_UIE_BUS_RST | RB_UIE_TRANSFER;
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PFIC_EnableIRQ(USB_IRQn);
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}
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__INTERRUPT
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__HIGH_CODE
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void USB_IRQHandler(void) {
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uint8_t interrupt = R8_USB_INT_FG;
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if (interrupt & RB_UIF_BUS_RST) {
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handle_bus_reset();
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}
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if (interrupt & RB_UIF_SUSPEND) {
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handle_suspend();
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}
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if (interrupt & RB_UIF_TRANSFER) {
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uint8_t status = R8_USB_INT_ST;
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uint8_t ep_num = status & MASK_UIS_ENDP;
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uint8_t token = ((status & MASK_UIS_TOKEN) >> 4) & 0x03;
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if (token == 0x00) { // OUT
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if (status & RB_UIS_TOG_OK) handle_transfer(ep_num, 0);
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R8_USB_INT_FG = RB_UIF_TRANSFER;
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} else if (token == 0x01) { // SOF
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handle_sof();
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R8_USB_INT_FG = RB_UIF_TRANSFER;
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} else if (token == 0x02) { // IN
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handle_transfer(ep_num, 1);
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R8_USB_INT_FG = RB_UIF_TRANSFER;
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}
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if ((status & RB_UIS_SETUP_ACT)) {
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handle_setup_request();
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R8_USB_INT_FG = RB_UIF_TRANSFER;
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}
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}
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}
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// Receive up to buflen bytes from selected OUT endpoint.
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// If data is not yet available, returns -1.
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int16_t usb_recv(uint8_t endpoint, void *buffer, size_t buflen) {
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if (recvlens[endpoint] == 0xFF) {
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set_endpoint_state(endpoint, USB_EP_STATE_ACK);
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return -1;
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}
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if (recvlens[endpoint] < buflen) {
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buflen = recvlens[endpoint];
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}
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recvlens[endpoint] = 0xFF;
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memcpy(buffer, buf_for_ep(endpoint, 0), buflen);
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return buflen;
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}
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// Sends up to buflen bytes to selected IN endpoint.
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// If the buffer is still busy, returns -1.
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int16_t usb_xmit(uint8_t endpoint, void *buffer, size_t buflen) {
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if ((*ep_ctrl_regs[endpoint] & MASK_UEP_T_RES) != USB_EP_STATE_NAK) {
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return -1;
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}
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if (buflen > 64) buflen = 64;
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memcpy(buf_for_ep(endpoint, 1), buffer, buflen);
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*ep_t_len_regs[endpoint] = buflen;
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set_endpoint_state(endpoint | 0x80, USB_EP_STATE_ACK);
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return buflen;
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}
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int usb_can_xmit(uint8_t endpoint) {
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return (*ep_ctrl_regs[endpoint] & MASK_UEP_T_RES) == USB_EP_STATE_NAK;
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}
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int usb_connected(void) {
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return !!(R8_USB_MIS_ST & RB_UMS_SUSPEND);
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}
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